When the device powers up (rising V
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� MCP4011-103E/MS
寤犲晢锛� Microchip Technology
鏂囦欢闋佹暩(sh霉)锛� 21/54闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC DGTL POT 10K 1CH 8MSOP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 100
鎺ョ墖锛� 64
闆婚樆锛堟瓙濮嗭級锛� 10k
闆昏矾鏁�(sh霉)锛� 1
婧害绯绘暩(sh霉)锛� 妯�(bi膩o)婧�(zh菙n)鍊� 150 ppm/°C
瀛樺劜鍣ㄩ鍨嬶細 鏄撳け
鎺ュ彛锛� 2 绶氫覆琛岋紙鑺墖閬告搰锛屽/娓涳級
闆绘簮闆诲锛� 1.8 V ~ 5.5 V
宸ヤ綔婧害锛� -40°C ~ 125°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-TSSOP锛�8-MSOP锛�0.118"锛�3.00mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-MSOP
鍖呰锛� 绠′欢
鐢�(ch菐n)鍝佺洰閷勯爜闈細 674 (CN2011-ZH PDF)
MCP4011/2/3/4
DS21978C-page 28
2006 Microchip Technology Inc.
4.2
Power-up
When the device powers up (rising VDD crosses the
Trip Point Voltage (VTP)), the 鈥渄efault鈥� wiper setting is
restored. Table 4-1 shows the default value loaded into
the wiper on POR/BOR.
TABLE 4-1:
DEFAULT POR WIPER
SETTING SELECTION
While VDD < Vmin (1.8V), the electrical performance
may not meet the data sheet specifications (see
Figure 4-2). The wiper state may be unknown. Also, the
device may be capable of incrementing or decrement-
ing, if a valid command is detected on the CS and U/D
pins.
4.3
Brown Out
If the device VDD is below the specified minimum
voltage, care must be taken to ensure that the CS and
U/D pins do not 鈥渃reate鈥� any of the serial commands.
When the device VDD drops below VMIN (1.8V), the
electrical performance may not meet the data sheet
specifications (see Figure 4-2). The wiper state may be
unknown. Also, the device may be capable of
incrementing or decrementing, if a valid command is
detected on the CS and U/D pins.
When the device voltage rises from below the power-
up trip point (VTP) into the valid operation voltage
range, the wiper state will be forced to the default POR
wiper setting (see Table 4-1).
4.4
Serial Interface Inactive
The serial interface is inactive any time the CS pin is at
VIH and all write cycles are completed.
FIGURE 4-2:
Power-up and Brown-out.
Package
Code
Default
POR
Wiper
Setting
Wiper
Code
Typical
RAB Value
-202
Mid-scale
1Fh
2.1 k
-502
Mid-scale
1Fh
5.0 k
-103
Mid-scale
1Fh
10.0 k
-503
Mid-scale
1Fh
50.0 k
VTP
VSS
VDD
1.8V
POR Trip Point (on Rising VDD)
Outside Device Operation
Wiper Forced to Default POR Setting
鐩搁棞(gu膩n)PDF璩囨枡
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鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
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MCP4011-202E/CH 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:Low-Cost 64-Step Volatile Digital POT
MCP4011-202E/MC 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:Low-Cost 64-Step Volatile Digital POT
MCP4011-202E/MS 鍔熻兘鎻忚堪:鏁�(sh霉)瀛楅浕浣嶈▓ IC 2.1k U/Dsingle 6-bit V POT RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 闆婚樆:200 Ohms 婧害绯绘暩(sh霉):35 PPM / C 瀹瑰樊:25 % POT 鏁�(sh霉)閲�:Dual 姣� POT 鍒嗘帴闋�:256 寮у埛瀛樺劜鍣�:Volatile 绶╂矕鍒�: 鏁�(sh霉)瀛楁帴鍙�:Serial (3-Wire, SPI) 鎻忚堪/鍔熻兘:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 宸ヤ綔闆绘簮闆诲:1.7 V to 5.5 V 闆绘簮闆绘祦:27 uA 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:TQFN-16 灏佽:Reel
MCP4011-202E/MS 鍒堕€犲晢:Microchip Technology Inc 鍔熻兘鎻忚堪:; LEADED PROCESS COMPATIBLE:YES; PEAK RE 鍒堕€犲晢:Microchip Technology Inc 鍔熻兘鎻忚堪:IC, DIG POT, 2.1 kohm, 64 Steps, Single, MSOP
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