參數(shù)資料
型號： MCP3911A0T-E/ML
廠商： Microchip Technology
文件頁數(shù)： 5/17頁
文件大?。?/td> 0K
描述： IC AFE 24BIT 125KSPS 2CH 20-QFN
標準包裝： 3,300
位數(shù)： 24
通道數(shù)： 2
電壓 - 電源，模擬： 2.7 V ~ 3.6 V
電壓 - 電源，數(shù)字： 2.7 V ~ 3.6 V
封裝/外殼： 20-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 20-QFN（4x4）
包裝： 帶卷 (TR)
2012 Microchip Technology Inc.
DS22286A-page 13
MCP3911
Note:
Unless otherwise indicated, AVDD = 3.3V, DVDD = 3.3V; TA = 25 °C, MCLK = 4 MHz; PRESCALE = 1; OSR
= 256; GAIN = 1; Dithering = Maximum; VIN = -0.5 dBFS @ 60 Hz, VREFEXT = 0; CLKEXT = 1, AZ_FREQ
= 0; BOOST = 1X.
FIGURE 2-13:
SINAD vs. OSR.
L
FIGURE 2-14:
SNR vs.OSR.
FIGURE 2-15:
SFDR vs. OSR.
FIGURE 2-16:
THD vs. MCLK.
FIGURE 2-17:
SINAD vs. MCLK.
FIGURE 2-18:
SNR vs. MCLK.
40
50
60
70
80
90
100
110
120
o
-Noise
and
Distortion
Ratio
(dB)
Dithering = Maximum
Dithering = Medium
Dithering = Minimum
Dithering = None
0
10
20
30
40
32
64
128
256
512
1024 2048 4096
Signal-t
o
Oversampling Ratio (OSR)
40
50
60
70
80
90
100
110
120
-to-Noise
Ratio
(dB)
Dithering = Maximum
Dithering = Medium
Dithering = Minimum
Dithering = None
0
10
20
30
40
32
64
128
256
512
1024
2048
4096
Signal
-
Oversampling Ratio (OSR)
50
60
70
80
90
100
110
120
130
140
ree
Dy
namic
Range
(dBFS)
Dithering = Maximum
Dithering = Medium
Dithering = Minimum
Dithering = None
0
10
20
30
40
32
64
128
256
512
1024 2048 4096
Spurious
F
r
Oversampling Ratio (OSR)
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
rmonic
Distortion
(dBc)
Boost = 0.5x
Boost = 0.66x
Boost = 1x
-120
-110
-100
90
0
5
10
15
20
25
30
To
ta
lH
a
MCLK Frequency (MHz)
Boost = 2x
40
50
60
70
80
90
100
110
120
-Noise
and
Distortion
Ratio
(dB)
Boost =05x
Boost = 0.66x
Boost = 2x
Boost = 1x
0
10
20
30
40
0
5
10
15
20
25
30
Signal-to
-
MCLK Frequency (MHz)
Boost =0.5x
40
50
60
70
80
90
100
110
120
al
to
Noise
Ratio
(dB)
Boost = 0.5x
Boost = 0.66x
Boost = 2x
Boost = 1x
0
10
20
30
0
5
10
15
20
25
30
Sign
MCLK Frequency (MHz)
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