參數(shù)資料
型號: MCP3421A0T-E/CH
廠商: Microchip Technology
文件頁數(shù): 24/42頁
文件大?。?/td> 0K
描述: IC ADC 18BIT 3.75SPS 1CH SOT23-6
產(chǎn)品培訓(xùn)模塊: MCP3901 Analog Front End
標準包裝: 1
位數(shù): 18
采樣率(每秒): 3.75
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-6
供應(yīng)商設(shè)備封裝: SOT-23-6
包裝: 標準包裝
輸入數(shù)目和類型: 2 個單端,雙極;1 個差分,單極
產(chǎn)品目錄頁面: 672 (CN2011-ZH PDF)
其它名稱: MCP3421A0T-E/CHDKR
MCP3421
DS22003E-page 30
2009 Microchip Technology Inc.
6.2.3
PRESSURE MEASUREMENT
Figure 6-7 shows an example of measuring the
pressure
using
NPP301
(manufactured
by
GE NovaSensor). No external signal conditioning
circuit is needed by utilizing its internal PGA. The
pressure sensor output is 20 mV/V. This gives 100 mV
of full scale output for VDD of 5V (sensor excitation
voltage). Equation 6-1 shows an example of calculat-
ing the number of output code for the full scale output
of the NPP301.
FIGURE 6-7:
Example of Pressure
Measurement.
EQUATION 6-1:
EXPECTED NUMBER OF
OUTPUT CODE FOR
NPP301 PRESSURE
SENSOR
6.2.4
WHEATSTONE BRIDGE TYPE
SENSORS WITH SIGNAL
CONDITIONING
Wheatstone bridge is one of the most common
configurations in the sensor applications. Strain
gauges and pressure sensors are the common
examples. When the sensor output signal is small and
the common mode noise level is large, it needs a signal
conditioning circuit between the sensor and the
MCP3421. Figure 6-8 and Figure 6-9 show examples
of using the MCP6V01 (high precision auto-zeroed
Op Amp) for the sensor signal conditioning. Figure 6-8
shows the interface circuit with a minimum of compo-
nents between the sensor and the MCP3421, but it is
not symmetric, and therefore, the ADC input becomes
a single ended. On the other hand, the Figure 6-9 has
a symmetric and differential output, but requires more
components.
FIGURE 6-8:
Simple Signal Conditioning
Design with Asymmetric Circuit.
FIGURE 6-9:
High Performance Signal
Conditioning Design with Symmetric Circuit.
NPP301
MCP3421
VIN+
VIN-
VDD
VSS
1
2
3
4
5
6
SCL
SDL
10 F
0.1 F
R
VDD
TO MCU
(MASTER)
VDD
Expected
log
2
100 mV
15.625
μV
PGA
------------------------
Number of Output Code =
Where:
1 LSB
=
15.625 V with 18 Bit configuration.
= 12.64 bits for PGA
=1
= 13.64 bits for PGA
=2
= 14.64 bits for PGA
=4
= 15.64 bits for PGA
=8
VDD
RR
100R
C
MCP6V01
VDD
0.2R
3k
Ω
MCP3421
20 k
Ω
1F
20 k
Ω
1F
VDD
1/2 MCP6V02
200
Ω
200
Ω
3k
Ω
3k
Ω
1F
RR
VDD
10 nF
200
Ω
200
Ω
MCP3421
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