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參數(shù)資料
| 型號： | MCP3221A7T-E/OT |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 4/28頁 |
| 文件大小： | 0K |
| 描述： | ADC 12BIT I2C INTERFACE SOT23-5 |
| 標準包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 22.3k |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SC-74A，SOT-753 |
| 供應商設備封裝： | SOT-23-5 |
| 包裝： | 標準包裝 |
| 輸入數(shù)目和類型： | 1 個單端，單極 |
| 其它名稱： | MCP3221A7T-E/OTDKR |
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MCP3221
DS21732C-page 12
2006 Microchip Technology Inc.
3.0
PIN FUNCTIONS
TABLE 3-1:
PIN FUNCTION TABLE
3.1
VDD and VSS
The VDD pin, with respect to VSS, provides power to the
device as well as a voltage reference for the conversion
process. Refer to Section 6.4 “Device Power and
Layout Considerations”, “Device Power and Layout
Considerations”, for tips on power and grounding.
3.2
Analog Input (AIN)
AIN is the input pin to the sample-and-hold circuitry of
the Successive Approximation Register (SAR) con-
verter. Care should be taken in driving this pin. Refer to
Section 6.1 “Driving the Analog Input”, “Driving the
Analog Input”. For proper conversions, the voltage on
this pin can vary from VSS to VDD.
3.3
Serial Data (SDA)
SDA is a bidirectional pin used to transfer addresses
and data into and out of the device. Since it is an open-
drain terminal, the SDA bus requires a pull-up resistor
to VDD (typically 10 kΩ for 100 kHz and 2 kΩ for
400 kHz SCL clock speeds). Refer to Section 6.2
Bus”, for more information.
For normal data transfer, SDA is allowed to change only
during SCL low. Changes during SCL high are reserved
for indicating the START and STOP conditions. Refer to
Characteristics”.
3.4
Serial Clock (SCL)
SCL is an input pin used to synchronize the data trans-
fer to and from the device on the SDA pin and is an
open-drain terminal. Therefore, the SCL bus requires a
pull-up resistor to VDD (typically 10 kΩ for 100 kHz and
2k
Ω for 400 kHz SCL clock speeds. Refer to
Section 6.2 “Connecting to the I2C Bus”, “Connect-
ing to the I2C Bus”).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the START and STOP
conditions. Refer to Section 6.1 “Driving the Analog
Input”, “Driving the Analog Input”.
Name
Function
VDD
+2.7V to 5.5V Power Supply
VSS
Ground
AIN
Analog Input
SDA
Serial Data In/Out
SCL
Serial Clock In
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