V
參數(shù)資料
型號: MCP3208T-BI/SL
廠商: Microchip Technology
文件頁數(shù): 12/40頁
文件大小: 0K
描述: IC ADC 12BIT 2.7V 8CH SPI 16SOIC
標準包裝: 2,600
位數(shù): 12
采樣率(每秒): 100k
數(shù)據(jù)接口: 串行,SPI?
轉換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 16-SOIC
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個單端,單極;4 個偽差分,單極
MCP3204/3208
DS21298E-page 2
2008 Microchip Technology Inc.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings
VDD...................................................................................7.0V
All inputs and outputs w.r.t. VSS ............... -0.6V to VDD +0.6V
Storage temperature .....................................-65°C to +150°C
Ambient temp. with power applied ................-65°C to +125°C
Soldering temperature of leads (10 seconds) .............+300°C
ESD protection on all pins.............................................> 4 kV
Notice:
Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect
device reliability.
ELECTRICAL SPECIFICATIONS
Electrical Characteristics:
Unless otherwise noted, all parameters apply at VDD = 5V, VSS = 0V, VREF = 5V,
TA = -40°C to +85°C,fSAMPLE = 100 ksps and fCLK = 20*fSAMPLE
Parameters
Sym
Min
Typ
Max
Units
Conditions
Conversion Rate
Conversion Time
tCONV
12
clock
cycles
Analog Input Sample Time
tSAMPLE
1.5
clock
cycles
Throughput Rate
fSAMPLE
100
50
ksps
VDD = VREF = 5V
VDD = VREF = 2.7V
DC Accuracy
Resolution
12
bits
Integral Nonlinearity
INL
±0.75
±1.0
±1
±2
LSB
MCP3204/3208-B
MCP3204/3208-C
Differential Nonlinearity
DNL
±0.5
±1
LSB
No missing codes
over-temperature
Offset Error
±1.25
±3
LSB
Gain Error
±1.25
±5
LSB
Dynamic Performance
Total Harmonic Distortion
-82
dB
VIN = 0.1V to 4.9V@1 kHz
Signal to Noise and Distortion
(SINAD)
—72
dB
VIN = 0.1V to 4.9V@1 kHz
Spurious Free Dynamic
Range
—86
dB
VIN = 0.1V to 4.9V@1 kHz
Reference Input
Voltage Range
0.25
VDD
V
Current Drain
100
0.001
150
3.0
A
CS = VDD = 5V
Analog Inputs
Input Voltage Range for CH0-
CH7 in Single-Ended Mode
VSS
—VREF
V
Input Voltage Range for IN+ in
pseudo-differential Mode
IN-
VREF+IN-
Note 1:
This parameter is established by characterization and not 100% tested.
2:
See graphs that relate linearity performance to VREF levels.
3:
Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity
performance, particularly at elevated temperatures. See Section 6.2 “Maintaining Minimum Clock
, “Maintaining Minimum Clock Speed”, for more information.
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