參數(shù)資料
型號(hào)： MCP2510T-E/P
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PDIP18
封裝： 0.300 INCH, PLASTIC, DIP-18
文件頁數(shù)： 60/76頁
文件大?。?/td> 1076K
代理商： MCP2510T-E/P
1999 Microchip Technology Inc.
Preliminary
DS21291C-page 63
MCP2510
TABLE 12-5: SPI Interface AC Characteristics
All parameters apply over the
specified operating ranges
unless otherwise noted.
Industrial (I):
TAMB = -40°C to +85°C
VDD = 3.0V to 5.5V
Automotive (E):
TAMB = -40°C to +125°C
VDD = 4.5V to 5.5V
Parameter
Symbol
Min
Max
Units
Test Conditions
Clock Frequency
FCLK
–
5
4
2.5
MHz
VDD = 4.5V to 5.5V
VDD = 4.5V to 5.5V (E temp)
VDD= 3.0V to 4.5V
CS Setup Time
TCSS
100
–
ns
CS Hold Time
TCSH
100
115
180
–
ns
VDD = 4.5V to 5.5V
VDD = 4.5V to 5.5V (E temp)
VDD =3.0V to 4.5V
CS Disable Time
TCSD
100
280
–
ns
VDD = 4.5V to 5.5V
VDD = 4.5V to 5.5V (E temp)
VDD = 3.0V to 4.5V
Data Setup Time
TSU
20
30
–
ns
VDD = 4.5V to 5.5V
VDD = 4.5V to 5.5V (E temp)
VDD = 3.0V to 4.5V
Data Hold Time
THD
20
50
–
ns
VDD = 4.5V to 5.5V
VDD = 4.5V to 5.5V (E temp)
VDD = 3.0V to 4.5V
CLK Rise Time
TR
–
2ms
Note
CLK Fall Time
TF
–
2ms
Note
Clock High Time
THI
90
115
180
–
ns
VDD = 4.5V to 5.5V
VDD = 4.5V to 5.5V (E temp)
VDD = 3.0V to 4.5V
Clock Low Time
TLO
90
115
180
–
ns
VDD = 4.5V to 5.5V
VDD = 4.5V to 5.5V (E temp)
VDD = 3.0V to 4.5V
Clock Delay Time
TCLD
50
–
ns
Clock Enable Time
TCLE
50
–
ns
Output Valid from Clock Low
TV
–
90
115
180
ns
VDD = 4.5V to 5.5V
VDD = 4.5V to 5.5V (E temp)
VDD =3.0V to 4.5V
Output Hold Time
THO
0
–
ns
Note
Output Disable Time
TDIS
–
200
ns
Note
Note:
This parameter is periodically sampled and not 100% tested.
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