2005 Microchip Technology Inc.
DS21919B-page 3
MCP23008/MCP23S08
1.0
DEVICE OVERVIEW
The MCP23X08 device provides 8-bit, general
purpose, parallel I/O expansion for I
2
C bus or SPI
applications. The two devices differ in the number of
hardware address pins and the serial interface:
MCP23008 – I
2
C interface; three address pins
MCP23S08 – SPI interface; two address pins
The MCP23X08 consists of multiple 8-bit configuration
registers for input, output and polarity selection. The
system master can enable the I/Os as either inputs or
outputs by writing the I/O configuration bits. The data
for each input or output is kept in the corresponding
Input or Output register. The polarity of the Input Port
register can be inverted with the Polarity Inversion
register. All registers can be read by the system master.
The interrupt output can be configured to activate
under two conditions (mutually exclusive):
1.
When any input state differs from its
corresponding input port register state. This is
used to indicate to the system master that an
input state has changed.
2.
When an input state differs from a preconfigured
register value (DEFVAL register).
The Interrupt Capture register captures port values at
the time of the interrupt, thereby saving the condition
that caused the interrupt.
The Power-on Reset (POR) sets the registers to their
default values and initializes the device state machine.
The hardware address pins are used to determine the
device address.
1.1
Pin Descriptions
TABLE 1-1:
PINOUT DESCRIPTION
Pin
Name
PDIP/S
OIC
SSOP
Pin
Type
Function
SCL/SCK
SDA/SI
A2/SO
1
2
3
1
2
3
I
Serial clock input.
Serial data I/O (
MCP23008
)/Serial data input (
MCP23S08
).
Hardware address input (
MCP23008
)/Serial data output (
MCP23S08
).
A2 must be biased externally.
Hardware address input. Must be biased externally.
Hardware address input. Must be biased externally.
External reset input
No connect (
MCP23008
)/External chip select input (
MCP23S08
).
Interrupt output. Can be configured for active-high, active-low or open-drain.
Ground.
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak
pull-up resistor.
Power.
I/O
I/O
A1
A0
RESET
NC/CS
INT
V
SS
GP0
4
5
6
7
8
9
4
5
6
7
8
9
I
I
I
I
O
P
I/O
10
12
GP1
11
13
I/O
GP2
12
14
I/O
GP3
13
15
I/O
GP4
14
16
I/O
GP5
15
17
I/O
GP6
16
18
I/O
GP7
17
19
I/O
V
DD
N/C
18
20
P
10, 11