參數(shù)資料
型號： MCP2140A-I/P
廠商： Microchip Technology
文件頁數(shù)： 64/66頁
文件大小： 0K
描述： IC IRDA CONTROLLR DTE/DCE 18DIP
標(biāo)準(zhǔn)包裝： 25
控制器類型： IRDA 標(biāo)準(zhǔn)協(xié)議?？刂破?br>
接口： UART
電源電壓： 3 V ~ 5.5 V
電流 - 電源： 2.2mA
工作溫度： -40°C ~ 125°C
安裝類型： 通孔
封裝/外殼： 18-DIP（0.300"，7.62mm）
供應(yīng)商設(shè)備封裝： 18-PDIP
包裝： 管件
產(chǎn)品目錄頁面： 685 (CN2011-ZH PDF)
配用： MCP2140DM-TMPSNS-ND - BOARD DEMO FOR MCP2140
2007-2011 Microchip Technology Inc.
DS22050B-page 7
MCP2140A
2.0
DEVICE OPERATION
The MCP2140A serial interface and IR baud rates are
fixed at 9600 baud, given a 3.6864 MHz device clock.
2.1
Power-Up
Any time the device is powered up (Parameter D003),
the Power-Up Timer delay (Parameter 33) occurs, fol-
lowed by an Oscillator Start-up Timer (OST) delay
(Parameter 32). Once these delays are complete, com-
munication with the device may be initiated. This com-
munication is from both the infrared transceiver’s side
and the controller’s UART interface.
2.1.1
POWER-ON AND BROWN-OUT
CONDITIONS
When any state machine is operated outside of its’
specified operating conditions, undesired operation
may occur. Application validation should be done to
determine when the system exits from either a Power-
On or a Brown-Out conditions if the MCP2140A
requires the use of an external voltage supervisory
circuit to ensure proper system operation.
2.2
Device Reset
The MCP2140A is forced into the Reset state when the
RESET pin is in the low state. Once the RESET pin is
brought to a high state, the device Reset sequence
occurs. Once the sequence completes, functional
operation begins.
2.3
Device Clocks
The MCP2140A requires a clock source to operate.
This clock source is used to establish the device timing,
including the device “Bit Clock”.
2.3.1
CLOCK SOURCE
The clock source can be supplied by one of the
following:
Crystal
Resonator
External clock
The frequency of this clock source must be
3.6864 MHz (electrical specification Parameter 1A) for
device communication at 9600 baud.
2.3.1.1
Crystal Oscillator / Ceramic
Resonators
A crystal or ceramic resonator can be connected to the
OSC1 and OSC2 pins to establish oscillation (refer to
Figure 2-1). The MCP2140A oscillator design requires
the use of a parallel-cut crystal. Use of a series cut
crystals may give a frequency outside of the crystal
manufacturers specifications.
FIGURE 2-1:
CRYSTAL OPERATION
(CERAMIC RESONATOR)
TABLE 2-1:
CAPACITOR SELECTION FOR
CERAMIC RESONATORS
TABLE 2-2:
CAPACITOR SELECTION FOR
CRYSTAL OSCILLATOR
Freq
OSC1 (C1)
OSC2 (C2)
3.6864 MHz
10 - 22 pF
Note:
Higher capacitance increases the stability
of the oscillator, but also increases the
start-up time. These values are for design
guidance only. Since each resonator has
its own characteristics, the user should
consult the resonator manufacturer for
appropriate
values
of
external
components.
Freq
OSC1 (C1)
OSC2 (C2)
3.6864 MHz
15 - 30 pF
Note:
Higher capacitance increases the stability
of the oscillator but also increases the
start-up time. These values are for design
guidance only. RS may be required to
avoid overdriving crystals with low drive
level specification. Since each crystal has
its own characteristics, the user should
consult the crystal manufacturer for
appropriate
values
of
external
components.
See Table 2-1 and Table 2-2 for recommended
values of C1 and C2.
Note:
A series resistor may be required for
AT strip cut crystals.
C1
C2
XTAL
OSC2
RS
OSC1
RF
To internal
MCP2140A
(Note)
logic
Ceramic
Resonator
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