參數(shù)資料
型號： MCP2050-500E/SL
廠商： Microchip Technology
文件頁數(shù)： 5/42頁
文件大?。?/td> 0K
描述： IC TXRX LIN 5.0V LDO/WWDT 14SOIC
產(chǎn)品培訓(xùn)模塊： Microchip MCP20xx LIN Transceiver Overview
標(biāo)準(zhǔn)包裝： 57
系列： *
2012 Microchip Technology Inc.
DS22299B-page 13
MCP2050
FIGURE 1-12:
VOLTAGE REGULATOR OUTPUT ON OVER CURRENT SITUATION
1.6
Optional External Protection
1.6.1
REVERSE BATTERY PROTECTION
An external reverse-battery-blocking diode should be
used to provide polarity protection (see Figure 1-14).
1.6.2
TRANSIENT VOLTAGE
PROTECTION (LOAD DUMP)
An external 43V transient suppressor (TVS) diode,
between VBB and ground, with a transient protection
resistor (RTP) in series with the battery supply and the
VBB pin protects the device from power transients and
ESD events greater than 43V (see Figure 1-14). The
maximum value for the RTP protection resistor depends
on two parameters: the minimum voltage the part will
start at, and the impacts of this RTP resistor on the VBB
value, thus on the Bus recessive level and slopes.
This leads to a set of three equations to fullfil.
Equation 1-1 provides a max RTP value according to
the minimum battery voltage the user wants the part to
start at.
Equation 1-2 provides a max RTP value according to
the maximum error on the recessive level thus VBB
since the part uses VBB as the reference value for the
recessive level.
Equation 1-3 provides a max RTP value according to
the maximum relative variation the user can accept on
the slope when IREG varies.
Since both Equation 1-1 and Equation 1-2 must be
fulfilled, the maximum allowed value for RTP is thus the
smaller of the two values found when solving
Usually Equation 1-1 gives the higher constraint
(smaller value) for RTP as shown in the following
example where VBATmin is 8V.
However, the user needs to check that the value found
with Equation 1-1 also fulfills Equation 1-2 and
While this protection is optional, it should be
considered as good engineering practice.
Note 1: IREG less than llim, regulator on.
2: After IOUT exceeds llim, voltage regulator output will be reduced until
voltage regulator shutdown voltage VSD is reached.
VSD
0
(1)
(2)
t
0
t
llim
IREG
mA
VREG
V
VREG-NOM
1
2
3
4
5
6
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