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| 型號： | MCM72CB64SG80 |
| 廠商： | MOTOROLA INC |
| 元件分類： | DRAM |
| 英文描述： | 600000 SYSTEM GATE 2.5 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 128K X 36 CACHE SRAM MODULE, 7 ns, DMA160 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 167K |
| 代理商： | MCM72CB64SG80 |
MCM72F8
MCM72F9
9
MOTOROLA FAST SRAM
2.1
INPUT
WAVEFORM
tr
TEST POINT
OUTPUT
BUFFER
2.1
0.3
0.3
OUTPUT
WAVEFORM
OUTPUT LOAD
tf
UNLOADED RISE AND FALL TIME MEASUREMENT
NOTES:
1. Input waveform has a slew rate of 1 V/ns.
2. Rise time is measured from 0.3 to 2.1 V unloaded.
3. Fall time is measured from 2.1 to 0.3 V unloaded.
Figure 3. Unloaded Rise and Fall Time Characterization
2.1
2.1
0.3
0.3
(a) Pull–Up
(b) Pull–Down
VOLTAGE (V)
PULL–UP
I (mA) MIN
I (mA) MAX
– 0.5
0
0.8
1.25
1.5
2.3
2.7
2.9
3.4
– 38
– 38
– 38
– 26
– 20
0
0
0
0
– 105
– 105
– 105
– 83
– 70
– 30
– 10
0
0
VOLTAGE (V)
PULL–DOWN
I (mA) MIN
I (mA) MAX
– 0.5
0
0.4
0.8
1.25
1.6
2.8
3.2
3.4
0
0
10
20
31
40
40
40
40
0
0
20
40
63
80
80
80
80
Figure 4. Output Buffer Characteristics
3.6
0
0
3.6
46
120
TEST POINT
50
LOAD
2.9
2.5
2.3
2.1
1.25
0.8
0
0
– 38
CURRENT (mA)
– 105
V
3.6
TEST POINT
VDD
1.6
1.25
0.3
0
0
40
CURRENT (mA)
80
V
50
LOAD
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