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參數(shù)資料
| 型號： | MCM69R618 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 1M Synchronous Late Write Fast SRAM(1M位同步遲寫、快速靜態(tài)RAM) |
| 中文描述： | 100萬同步后寫入快速靜態(tài)存儲器（100萬位同步遲寫，快速靜態(tài)內存） |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 141K |
| 代理商： | MCM69R618 |
MCM69R536
MCM69R618
9
MOTOROLA FAST SRAM
The table of timing values shows either a minimum
or a maximum limit for each parameter. Input require-
ments are specified from the external system point of
view. Thus, address setup time is shown as a mini-
mum since the system must supply at least that much
time. On the other hand, responses from the memory
are specified from the device point of view. Thus, the
access time is shown as a maximum since the device
never provides data later than that time.
TIMING LIMITS
DEVICE
UNDER
TEST
ZQ
50
50
0.75 V
VDDQ/2
Vref
250
Figure 1. AC Test Load
VOH
VSS
50%
100%
20% tKHKH
Figure 2. Undershoot Voltage
CROSSING POINT
VDDQ
VSS
VTR
VDIF
VCP
VCM*
Figure 3. Differential Inputs/Common Mode Input Voltage
*VCM, the Common Mode Input Voltage, equals VTR – ((VTR – VCP)/2).
VIH(ac)
Vref
VIL(ac)
VDDQ
VSS
Figure 4. AC Input Conditions
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