- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371093 > MCM69L738AZP8.5R (MOTOROLA INC) Circular Connector; Body Material:Aluminum; Series:PT07; No. of Contacts:12; Connector Shell Size:14; Connecting Termination:Solder; Circular Shell Style:Jam Nut Receptacle; Circular Contact Gender:Pin; Insert Arrangement:14-12 PDF資料下載
參數(shù)資料
| 型號： | MCM69L738AZP8.5R |
| 廠商： | MOTOROLA INC |
| 元件分類： | DRAM |
| 英文描述： | Circular Connector; Body Material:Aluminum; Series:PT07; No. of Contacts:12; Connector Shell Size:14; Connecting Termination:Solder; Circular Shell Style:Jam Nut Receptacle; Circular Contact Gender:Pin; Insert Arrangement:14-12 |
| 中文描述： | 128K X 36 CACHE SRAM, 8.5 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119 |
| 文件頁數(shù)： | 1/20頁 |
| 文件大小： | 212K |
| 代理商： | MCM69L738AZP8.5R |
MCM69L738A
MCM69L820A
1
Motorola, Inc. 1997
Advance Information
4M Late Write 2.5 V I/O
The MCM69L738A/820A is a 4 megabit synchronous late write fast static RAM
designed to provide high performance in secondary cache and ATM switch,
Telecom, and other high speed memory applications. The MCM69L820A
organized as 256K words by 18 bits, and the MCM69L738A organized as 128K
words by 36 bits wide are fabricated in Motorola’s high performance silicon gate
BiCMOS technology.
The differential CK clock inputs control the timing of read/write operations of
the RAM. At the rising edge of the CK clock all addresses, write enables, and
synchronous selects are registered. An internal buffer and special logic enable
the memory to accept write data on the rising edge of the CK clock a cycle after
address and control signals. Read data is available at the falling edge of the CK
clock.
The RAM uses 2.5 V inputs and outputs.
The synchronous write and byte enables allow writing to individual bytes or the
entire word.
Byte Write Control
Single 3.3 V + 10%, – 5% Operation
2.5 V I/O (VDDQ)
Register to Latch Synchronous Operation
Asynchronous Output Enable
Boundary Scan (JTAG) IEEE 1149.1 Compatible
Differential Clock Inputs
Optional x18 or x36 organization
MCM69L738A/820A–8.5 = 8.5 ns
MCM69L738A/820A–9 = 9 ns
MCM69L738A/820A–9.5 = 9.5 ns
Sleep Mode Operation (ZZ Pin)
119 Bump, 50 mil (1.27 mm) Pitch, 14 mm x 22 mm Plastic Ball Grid Array
(PBGA) Package
This document contains information on a new product. Specifications and information herein are subject to change without notice.
Order this document
by MCM69L738A/D
SEMICONDUCTOR TECHNICAL DATA
MCM69L738A
MCM69L820A
ZP PACKAGE
PBGA
CASE 999–01
REV 1
8/13/97
相關PDF資料 |
PDF描述 |
|---|---|
| MCM69L820AZP8.5R | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT07; No. of Contacts:12; Connector Shell Size:14; Connecting Termination:Solder; Circular Shell Style:Jam Nut Receptacle |
| MCM69L738A | 4M Late Write 2.5 V I/O |
| MCM69L738AZP9 | 4M Late Write 2.5 V I/O |
| MCM69L820AZP8.5 | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT07; No. of Contacts:4; Connector Shell Size:12; Connecting Termination:Solder; Circular Shell Style:Jam Nut Receptacle; Body Style:Straight |
| MCM69L819A | 4M-bit Synchronous Late Write Fast SRAM(4M位同步遲寫、快速靜態(tài)RAM) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MCM69L738AZP9 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4M Late Write 2.5 V I/O |
| MCM69L738AZP9.5 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4M Late Write 2.5 V I/O |
| MCM69L738AZP9.5R | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4M Late Write 2.5 V I/O |
| MCM69L738AZP9R | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4M Late Write 2.5 V I/O |
| MCM69L817 | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:S2ADC⑩ - Simultaneous Sampling Analog to Digital Converter |
發(fā)布緊急采購，3分鐘左右您將得到回復。