MCM6949
3
MOTOROLA FAST SRAM
TRUTH TABLE
(X = Don’t Care)
E
G
W
Mode
I/O Pin
Cycle
Current
H
X
X
Not Selected
High–Z
—
ISB1, ISB2
IDDA
IDDA
IDDA
L
H
H
Output Disabled
High–Z
—
L
L
H
Read
Dout
High–Z
Read
L
X
L
Write
Write
ABSOLUTE MAXIMUM RATINGS
(See Note)
Rating
Symbol
Value
Unit
Power Supply Voltage Relative to VSS
Voltage Relative to VSS for Any Pin
Except VDD
VDD
Vin, Vout
– 0.5 to + 5.0
V
– 0.5 to VDD + 0.5
V
Output Current (per I/O)
Iout
±
20
mA
Power Dissipation
PD
Tbias
TA
Tstg
1.0
W
Temperature Under Bias
– 10 to + 85
°
C
Operating Temperature
0 to + 70
°
C
Storage Temperature — Plastic
– 55 to + 150
°
C
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VDD = 3.3 V – 5%, + 10%, TA = 0 to + 70
°
C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage (Operating Voltage Range)
VDD
VIH
VIL
3.135
3.3
3.63
V
Input High Voltage
2.2
—
VDD + 0.3
0.8
V
Input Low Voltage
– 0.5
*
—
V
* VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width
≤
2.0 ns).
DC CHARACTERISTICS
Parameter
Symbol
Min
Max
Unit
Input Leakage Current (All Inputs, Vin = 0 to VDD)
Output Leakage Current (E = VIH, Vout = 0 to VDD)
Output Low Voltage (IOL = + 8.0 mA)
Output High Voltage (IOH = – 4.0 mA)
Ilkg(I)
Ilkg(O)
VOL
VOH
—
±
1.0
μ
A
—
±
1.0
μ
A
—
0.4
V
2.4
—
V
POWER SUPPLY CURRENTS
Parameter
Symbol
0 to + 70
°
C
Unit
AC Active Supply Current
(Iout = 0 mA, VDD = Max)
MCM6949–8: tAVAV = 8 ns
MCM6949–10: tAVAV = 10 ns
MCM6949–12: tAVAV = 12 ns
MCM6949–15: tAVAV = 15 ns
MCM6949–8: tAVAV = 8 ns
MCM6949–10: tAVAV = 10 ns
MCM6949–12: tAVAV = 12 ns
MCM6949–15: tAVAV = 15 ns
IDD
195
165
160
155
mA
AC Standby Current (VDD = Max, E = VIH,
No Other Restrictions on Other Inputs)
ISB1
55
50
50
45
mA
CMOS Standby Current (E
≥
VDD – 0.2 V, Vin
≤
VSS + 0.2 V or
≥
VDD – 0.2 V)
(VDD = Max, f = 0 MHz)
ISB2
20
mA
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to these high–impedance
circuits.
This BiCMOS memory circuit has been
designed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The circuit is in a test
socket or mounted on a printed circuit board and
transverse air flow of at least 500 linear feet per
minute is maintained.