參數(shù)資料
型號: MCM6227A
廠商: Motorola, Inc.
英文描述: 1M x 1 Bit Static Random Access Memory
中文描述: 100萬× 1位靜態(tài)隨機存取存儲器
文件頁數(shù): 1/8頁
文件大?。?/td> 210K
代理商: MCM6227A
MCM6227A
1
Motorola, Inc. 1994
1M x 1 Bit Static Random
Access Memory
The MCM6227A is a 1,048,576 bit static random–access memory organized
as 1,048,576 words of 1 bit, fabricated using high–performance silicon–gate
CMOS technology. Static design eliminates the need for external clocks or timing
strobes while CMOS circuitry reduces power consumption and provides for
greater reliability.
The MCM6227A is equipped with a chip enable (E) pin. In less than a cycle time
after E goes high, the part enters a low–power standby mode, remaining in that
state until E goes low again.
The MCM6227A is available in 400 mil, 28–lead surface–mount SOJ pack-
ages.
Single 5 V
±
10% Power Supply
Fast Access Times: 20, 25, 35, and 45 ns
Equal Address and Chip Enable Access Times
Input and Output are TTL Compatible
Three–State Output
Low Power Operation: 160/140/130/120 mA Maximum, Active AC
BLOCK DIAGRAM
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A2
A3
A4
A5
A6
A7
A8
A9
MEMORY MATRIX
1024 ROWS x
1024 COLUMNS
ROW
DECODER
INPUT
DATA
CONTROL
COLUMN I/O
COLUMN DECODER
E
W
Q
D
VSS
VCC
A0
A1
Order this document
by MCM6227A/D
SEMICONDUCTOR TECHNICAL DATA
PIN ASSIGNMENT
MCM6227A
WJ PACKAGE
400 MIL SOJ
CASE 810–03
19
18
17
16
15
28
27
26
25
24
23
22
21
20
A0
A1
A2
A3
A4
A5
NC
A6
A7
A8
A9
Q
W
VSS
VCC
A19
A18
A17
A16
A14
NC
A13
A12
A11
A10
D
A15
10
11
12
13
14
1
2
3
4
5
6
7
8
9
A0 – A19
W
. . . . . . . . . . . . . . . . . . . . .
E
. . . . . . . . . . . . . . . . . . . . . .
D
. . . . . . . . . . . . . . . . . . . . . . . .
Q
. . . . . . . . . . . . . . . . . . . . .
NC
. . . . . . . . . . . . . . . . . .
VCC
. . . . . . . . . . . . .
VSS
. . . . . . . . . . . . . . . . . . . . . . . .
Address Inputs
Write Enable
Chip Enable
Data Input
Data Output
No Connection
+ 5 V Power Supply
. . . . . . . . . . . . .
Ground
PIN NAMES
E
REV 4
5/95
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