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參數(shù)資料
| 型號(hào)： | MCM6226BBXJ17R2 |
| 廠商： | MOTOROLA INC |
| 元件分類： | DRAM |
| 英文描述： | 128K x 8 Bit Static Random Access Memory |
| 中文描述： | 128K X 8 STANDARD SRAM, 17 ns, PDSO32 |
| 封裝： | 0.400 INCH, SOJ-32 |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大?。?/td> | 156K |
| 代理商： | MCM6226BBXJ17R2 |
MCM6226BB
6
MOTOROLA FAST SRAM
WRITE CYCLE 2
(E Controlled, See Notes 1, 2, 3, and 4)
6226BB–15
6226BB–17
6226BB–20
6226BB–25
6226BB–35
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Unit
Notes
Write Cycle Time
tAVAV
tAVEL
tAVEH
tELEH,
tELWH
15
—
17
—
20
—
25
—
35
—
ns
5
Address Setup Time
0
—
0
—
0
—
0
—
0
—
ns
Address Valid to End of Write
12
—
14
—
15
—
17
—
20
—
ns
Enable to End of Write
12
—
14
—
15
—
17
—
20
—
ns
6, 7
Write Pulse Width
tWLEH
tDVEH
tEHDX
tEHAX
12
—
14
—
15
—
17
—
20
—
ns
Data Valid to End of Write
7
—
8
—
9
—
10
—
11
—
ns
Data Hold Time
0
—
0
—
0
—
0
—
0
—
ns
Write Recovery Time
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus con-
tention conditions during read and write cycles.
3. E1 and E2 are represented by E in this data sheet. E2 is of opposite polarity to E1.
4. If G goes low coincident with or after W goes low, the output will remain in a high–impedance state.
5. All timings are referenced from the last valid address to the first transitioning address.
6. If E goes low coincident with or after W goes low, the output will remain in a high–impedance state.
7. If E goes high coincident with or before W goes high, the output will remain in a high–impedance state.
0
—
0
—
0
—
0
—
0
—
ns
WRITE CYCLE 2
(E Controlled See Notes 1, 2, 3, and 4)
tEHDX
tDVEH
tEHAX
tELWH
tAVEL
tAVEH
DATA VALID
tAVAV
HIGH–Z
A (ADDRESS)
W (WRITE ENABLE)
E (CHIP ENABLE)
Q (DATA OUT)
D (DATA IN)
tELEH
tWLEH
ORDERING INFORMATION
(Order by Full Part Number)
Motorola Memory Prefix
Part Number
Package (XJ = 400 mil SOJ, EJ = 300 mil SOJ)
Full Part Numbers — MCM6226BBXJ15
MCM6226BBXJ15R2
MCM6226BBXJ17R2
MCM6226BBXJ20R2
MCM6226BBXJ25R2
MCM6226BBXJ35R2
MCM6226BBEJ15
MCM6226BBEJ17
MCM6226BBEJ20
MCM6226BBEJ25
MCM6226BBEJ35
MCM6226BBEJ15R2
MCM6226BBEJ17R2
MCM6226BBEJ20R2
MCM6226BBEJ25R2
MCM6226BBEJ35R2
MCM6226BBXJ17
MCM6226BBXJ20
MCM6226BBXJ25
MCM6226BBXJ35
Shipping Method (R2 = Tape and Reel, Blank = Rails)
Speed (15 = 15 ns, 17 = 17 ns, 20 = 20 ns, 25 = 25 ns,
35 = 35 ns)
MCM 6226BB
XX
XX
XX
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCM6226BBXJ35 | POT 20K OHM 7MM CERMET TOP SMD |
| MCM6226BBEJ35R2 | 128K x 8 Bit Static Random Access Memory |
| MCM6226BBEJ15 | 128K x 8 Bit Static Random Access Memory |
| MCM6226BBEJ15R2 | 128K x 8 Bit Static Random Access Memory |
| MCM6226BBEJ17 | 128K x 8 Bit Static Random Access Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCM6226BBXJ20 | 制造商:Motorola Inc 功能描述: |
| MCM6226BBXJ20R2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:128K x 8 Bit Static Random Access Memory |
| MCM6226BBXJ25 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:128K x 8 Bit Static Random Access Memory |
| MCM6226BBXJ25R2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:128K x 8 Bit Static Random Access Memory |
| MCM6226BBXJ35 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:128K x 8 Bit Static Random Access Memory |
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