參數(shù)資料
型號: MCM44C256B
廠商: Motorola, Inc.
英文描述: 4MB R4000 Secondary Cache Fast Static RAM Module Set
中文描述: 二級緩存4MB的R4000的快速靜態(tài)存儲器模塊集
文件頁數(shù): 7/8頁
文件大?。?/td> 81K
代理商: MCM44C256B
MCM44256B SERIES
7
MOTOROLA FAST SRAM
WRITE CYCLE 2
(DCS or TCS Controlled, See Notes 1 and 2)
Parameter
Symbol
b l
–12
–15
–17
U i
Unit
Notes
Min
Max
Min
Max
Min
Max
Address Setup Time
tAVEL
tA0VEL
tAVEH
tA0VEH
tELEH,
tELWH
0
0
0
ns
A0 Setup Time
0
0
0
ns
Address Valid to End of Write
12
15
17
ns
A0 Valid to End of Write
10
12
14
ns
Data/Tag Enable to End of Write
12
15
17
ns
Data Valid to End of Write
tDVEH
tEHDX
tEHAX
tEHA0X
6
7
8
ns
Data Hold Time
5
5
5
ns
Write Recovery Time
5
5
5
ns
Write Recovery Time — A0
5
5
5
ns
NOTES:
1. A write occurs during the overlap of DCS or TCS low and WE low.
2. Enable timings are the same for both DCS and TCS.
tEHDX
tDVEH
tEHAX
tELWH
tELEH
tAVEL
DATA VALID
HIGH–Z
WE (WRITE ENABLE)
DCS/TCS
(DATA/TAG ENABLE)
Q (DATA OUT)
D (DATA IN)
A1 – A17
tAVEH
A0
tEHA0X
tA0VEL
tA0VEH
WRITE CYCLE 2
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