參數(shù)資料
型號： MCIMX31LVKN5BR2
廠商： Freescale Semiconductor
文件頁數(shù)： 101/122頁
文件大小： 0K
描述： IC MPU MAP I.MX31L 457-MAPBGA
標(biāo)準(zhǔn)包裝： 1,000
系列： i.MX31
核心處理器： ARM11
芯體尺寸： 32-位
速度： 532MHz
連通性： 1 線，ATA，EBI/EMI，F(xiàn)IR，I²C，MMC/SD，PCMCIA，SIM，SPI，SSI，UART/USART，USB，USB OTG
外圍設(shè)備： DMA，LCD，POR，PWM，WDT
程序存儲器類型： ROMless
RAM 容量： 16K x 8
電壓 - 電源 (Vcc/Vdd)： 1.22 V ~ 3.3 V
振蕩器型： 外部
工作溫度： 0°C ~ 70°C
封裝/外殼： 457-LFBGA
包裝： 帶卷 (TR)
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
8
Freescale Semiconductor
Functional Description and Application Information
SCC
Security
Controller
Module
Security
The SCC is a hardware component composed of two blocks—the
Secure RAM module, and the Security Monitor. The Secure RAM
provides a way of securely storing sensitive information.
—
SDHC
Secured Digital
Host Controller
Connectivity
Peripheral
The SDHC controls the MMC (MultiMediaCard), SD (Secure Digital)
memory, and I/O cards by sending commands to cards and
performing data accesses to and from the cards.
SDMA
Smart Direct
Memory Access
System
Control
Peripheral
The SDMA controller maximizes the system’s performance by
relieving the ARM core of the task of bulk data transfer from memory
to memory or between memory and on-chip peripherals.
—
SIM
Subscriber
Identification
Module
Connectivity
Peripheral
The SIM interfaces to an external Subscriber Identification Card. It is
an asynchronous serial interface adapted for Smart Card
communication for e-commerce applications.
SJC
Secure JTAG
Controller
Debug
The SJC provides debug and test control with maximum security and
provides a flexible architecture for future derivatives or future
multi-cores architecture.
SSI
Synchronous
Serial Interface
Multimedia
Peripheral
The SSI is a full-duplex, serial port that allows the device to
communicate with a variety of serial devices, such as standard
codecs, Digital Signal Processors (DSPs), microprocessors,
peripherals, and popular industry audio codecs that implement the
inter-IC sound bus standard (I2S) and Intel AC97 standard.
UART
Universal
Asynchronous
Receiver/Trans
mitter
Connectivity
Peripheral
The UART provides serial communication capability with external
devices through an RS-232 cable or through use of external circuitry
that converts infrared signals to electrical signals (for reception) or
transforms electrical signals to signals that drive an infrared LED (for
transmission) to provide low speed IrDA compatibility.
—
USB
Universal Serial
Bus—
2 Host
Controllers and
1 OTG
(On-The-Go)
Connectivity
Peripherals
USB Host 1 is designed to support transceiverless connection to
the on-board peripherals in Low Speed and Full Speed mode, and
connection to the ULPI (UTMI+ Low-Pin Count) and Legacy Full
Speed transceivers.
USB Host 2 is designed to support transceiverless connection to
the Cellular Modem Baseband Processor.
The USB-OTG controller offers HS/FS/LS capabilities in Host
mode and HS/FS in device mode. In Host mode, the controller
supports direct connection of a FS/LS device (without external
hub). In device (bypass) mode, the OTG port functions as gateway
between the Host 1 Port and the OTG transceiver.
WDOG
Watchdog Timer
Module
Timer
Peripheral
The WDOG module protects against system failures by providing a
method for the system to recover from unexpected events or
programming errors.
—
Table 3. Digital and Analog Modules (continued)
Block
Mnemonic
Block Name
Functional
Grouping
Brief Description
Section/
Page
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
i.MX31
Product
Family
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