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| 型號(hào)： | MCHC11F1CFNE2 |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 149/158頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 512 EEPROM 68-PLCC |
| 標(biāo)準(zhǔn)包裝： | 18 |
| 系列： | HC11 |
| 核心處理器： | HC11 |
| 芯體尺寸： | 8-位 |
| 速度： | 2MHz |
| 連通性： | SCI，SPI |
| 外圍設(shè)備： | POR，WDT |
| 輸入/輸出數(shù)： | 30 |
| 程序存儲(chǔ)器類型： | ROMless |
| EEPROM 大?。?/td> | 512 x 8 |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.75 V ~ 5.25 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x8b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 68-LCC（J 形引線） |
| 包裝： | 管件 |
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SERIAL COMMUNICATIONS INTERFACE
MC68HC11F1
7-4
TECHNICAL DATA
7.4 Wakeup Feature
The wakeup feature reduces SCI service overhead in multiple receiver systems. Soft-
ware for each receiver evaluates the first character of each message. The receiver is
placed in wakeup mode by writing a one to the RWU bit in the SCCR2 register. While
RWU is one, all of the receiver-related status flags (RDRF, IDLE, OR, NF, and FE) are
inhibited (cannot become set). Although RWU can be cleared by a software write to
SCCR2, to do so would be unusual. Normally RWU is set by software and is cleared
automatically with hardware. Whenever a new message begins, logic alerts the sleep-
ing receivers to wake up and evaluate the initial character of the new message.
Two methods of wakeup are available: idle-line wakeup and address-mark wakeup.
During idle-line wakeup, a sleeping receiver awakens as soon as the RxD line be-
comes idle. In the address-mark wakeup, logic one in the most significant bit (MSB) of
a character wakes up all sleeping receivers.
7.4.1 Idle-Line Wakeup
To use the receiver wakeup method, establish a software addressing scheme to allow
the transmitting devices to direct a message to individual receivers or to groups of re-
ceivers. This addressing scheme can take any form as long as all transmitting and re-
ceiving devices are programmed to understand the same scheme. Because the
addressing information is usually the first frame(s) in a message, receivers that are not
part of the current task do not become burdened with the entire set of addressing
frames. All receivers are awake (RWU = 0) when each message begins. As soon as
a receiver determines that the message is not intended for it, software sets the RWU
bit (RWU = 1), which inhibits further flag setting until the RxD line goes idle at the end
of the message. As soon as an idle line is detected by receiver logic, hardware auto-
matically clears the RWU bit so that the first frame of the next message can be re-
ceived. This type of receiver wakeup requires a minimum of one idle-line frame time
between messages, and no idle time between frames in a message.
7.4.2 Address-Mark Wakeup
The serial characters in this type of wakeup consist of seven (eight if M = 1) information
bits and an MSB, which indicates an address character (when set to one, or mark).
The first character of each message is an addressing character (MSB = 1). All receiv-
ers in the system evaluate this character to determine if the remainder of the message
is directed toward this particular receiver. As soon as a receiver determines that a
message is not intended for it, the receiver activates the RWU function by using a soft-
ware write to set the RWU bit. Because setting RWU inhibits receiver-related flags,
there is no further software overhead for the rest of this message.
When the next message begins, its first character has its MSB set, which automatically
clears the RWU bit and enables normal character reception. The first character whose
MSB is set is also the first character to be received after wakeup because RWU gets
cleared before the stop bit for that frame is serially received. This type of wakeup al-
lows messages to include gaps of idle time, unlike the idle-line method, but there is a
loss of efficiency because of the extra bit time for each character (address bit) required
for all characters.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCHC11F1CFNE2 | 制造商:Freescale Semiconductor 功能描述:8-Bit Microcontroller IC |
| MCHC11F1CFNE2R | 功能描述:8位微控制器 -MCU 8B MCU 1KRAM 512EE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MCHC11F1CFNE3 | 功能描述:8位微控制器 -MCU 8B MCU 1KRAM 512EE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MCHC11F1CFNE3 | 制造商:Freescale Semiconductor 功能描述:8-Bit Microcontroller IC |
| MCHC11F1CFNE3R | 功能描述:8位微控制器 -MCU 8B MCU 1KRAM 512EE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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