參數(shù)資料
型號: MCF52277CVM166
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 166.67 MHz, RISC PROCESSOR, PBGA196
封裝: 15 X 15 MM, PLASTIC, ROHS COMPLIANT, MAPBGA-196
文件頁數(shù): 10/42頁
文件大?。?/td> 1632K
代理商: MCF52277CVM166
MCF5227x ColdFire Microprocessor Data Sheet, Rev. 4
Preliminary—Subject to Change Without Notice
Electrical Characteristics
Freescale Semiconductor
18
5.6
ASP Electrical Characteristics
Table 10 lists the electrical specifications for the ASP module.
13
Discrete load capacitance for XTAL
Discrete load capacitance for EXTAL
CL_XTAL
CL_EXTAL
—2
× (C
L
CS_XTAL
CS_EXTAL
CS_PCB)
5
pF
14
Frequency un-LOCK Range
fUL
–4.0
4.0
% fsys
15
Frequency LOCK Range
fLCK
–2.0
2.0
% fsys
17
CLKOUT period jitter 2, 3, 6 measured at fsys max
Peak-to-peak jitter (Clock edge to clock edge)
Long-term jitter
Cjitter
10
TBD
% fsys/2
19
VCO frequency (fvco = fref × PFDR)
fvco
350
540
MHz
1 This parameter is guaranteed by characterization before qualification rather than 100% tested. Applies to external clock
reference only.
2 Proper PC board layout procedures must be followed to achieve specifications.
3 This parameter is guaranteed by design rather than 100% tested.
4 This specification is the PLL lock time only and does not include oscillator start-up time..
5
CS_PCB is the measured PCB stray capacitance on EXTAL and XTAL.
6
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fsys.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal.
Noise injected into the PLL circuitry via PLL VDD, EVDD, and VSS and variation in crystal oscillator frequency increase
the Cjitter percentage for a given interval.
Table 10. ASP Electrical Characteristics
Characteristic
Symbol
Min
Max
Unit
ASP Analog Supply Voltage
VDDA
3.0
3.6
V
Input Voltage Range
VADIN
0VDDA
V
Internal Reference Voltage
VREF
TBD
700
V
Operating Current Consumption
IDDA_ON
TBD
700
uA
Power-down Current Consumption
IDDA_OFF
TBD
1uA
Resolution
RES
—12
bits
Sampling rate
125
KS/s
Integral Non-linearity
INL
TBD
lsb1
Differential Non-linearity
DNL
TBD
ADC Internal Clock Frequency
tAIC
28
MHz
Conversion Range
RAD
0VDDA
V
Conversion Time
tADC
15
32
tAIC
cycles
Sample Time
tADS
320
tAIC
cycles
Table 9. PLL Electrical Characteristics (continued)
Num
Characteristic
Symbol
Min
Max
Unit
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