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參數(shù)資料
| 型號： | MCF51JU64VLH |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | FLASH, 50 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, LQFP-64 |
| 文件頁數(shù)： | 7/72頁 |
| 文件大小： | 1031K |
| 代理商： | MCF51JU64VLH |
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Table 6. Power consumption operating behaviors (continued)
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
IDD_VLLS1
Very low-leakage stop mode 1 current at 3.0 V
@ –40 to 25 °C
@ 70 °C
@ 105 °C
—
1.3
TBD
μA
IDD_OSC
Average current for OSC enabled with 32 kHz
crystal at 3.0 V
@ –40 to 25 °C
@ 70 °C
@ 105 °C
—
0.7
TBD
—
μA
1. The analog supply current is the sum of the active or disabled current for each of the analog modules on the device. See
each module's specification for its supply current.
2. 50 MHz core and system clocks, and 25 MHz bus clock. MCG configured for FEI mode. All peripheral clocks disabled.
3. 50 MHz core and system clocks, and 25 MHz bus clock. MCG configured for FEI mode. All peripheral clocks enabled, but
peripherals are not in active operation.
4. 50 MHz core and system clocks, and 25 MHz bus clock. MCG configured for FEI mode. All peripheral clocks enabled, and
peripherals are in active operation.
5. 25 MHz core and system clocks, and 12.5 MHz bus clock. MCG configured for FEI mode.
6. 50 MHz core and system clocks, and 25 MHz bus clock. MCG configured for FEI mode.
7. 2 MHz core and system clocks, and 1 MHz bus clock. MCG configured for BLPE mode. All peripheral clocks disabled.
Code executing from flash memory.
8. 2 MHz core and system clocks, and 1 MHz bus clock. MCG configured for BLPE mode. All peripheral clocks enabled, but
peripherals are not in active operation. Code executing from flash memory.
9. 2 MHz core and system clocks, and 1 MHz bus clock. MCG configured for BLPE mode. All peripheral clocks disabled.
10. OSC clocks disabled.
11. All pads disabled.
12. Data reflects devices with 32 KB of RAM. For devices with 16 KB of RAM, power consumption is reduced by 500 nA. For
devices with 8 KB of RAM, power consumption is reduced by 750 nA.
5.2.5.1 Diagram: Typical IDD_RUN operating behavior
The following data was measured under these conditions:
MCG in FEI mode (39.0625 kHz IRC), except for 1 MHz core (FBE)
All peripheral clocks disabled except FTFL
LVD disabled, USB voltage regulator disabled
No GPIOs toggled
Code execution from flash memory
DIAGRAM TBD
Figure 1. Run mode supply current vs. core frequency — all peripheral clocks disabled
The following data was measured under these conditions:
MCG in FEI mode (39.0625 kHz IRC), except for 1 MHz core (FBE)
All peripheral clocks enabled, but peripherals are not in active operation
Nonswitching electrical specifications
MCF51JF128 Advance Information Data Sheet, Rev. 3, 08/2011.
Freescale Semiconductor, Inc.
Preliminary
15
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MCF51MM128CLK | 功能描述:32位微控制器 - MCU 32BIT 128K FLASH RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
| MCF51MM128CLL | 制造商:Freescale Semiconductor 功能描述:32BIT 128K FLASH - Bulk |
| MCF51MM128CMB | 功能描述:32位微控制器 - MCU 32BIT 128K FLASH RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
| MCF51MM128CML | 制造商:Freescale Semiconductor 功能描述:32-BIT MCF51MM COLDFIRE RISC 128KB FLASH 2.5V/3.3V 104-PIN - Bulk |
| MCF51MM128VLK | 功能描述:32位微控制器 - MCU 32BIT 128K FLASH RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風格:SMD/SMT |
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