參數(shù)資料
型號: MCF51CN128CLH
廠商: Freescale Semiconductor
文件頁數(shù): 6/48頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 128K FLASH 64-LQFP
產(chǎn)品培訓模塊: MCF51CN Family - Ultimate Ethernet Solutions
Tower System
標準包裝: 160
系列: MCF51CN
核心處理器: Coldfire V1
芯體尺寸: 32-位
速度: 50MHz
連通性: 以太網(wǎng),I²C,SCI,SPI
外圍設備: LVD,PWM,WDT
輸入/輸出數(shù): 54
程序存儲器容量: 128KB(128K x 8)
程序存儲器類型: 閃存
RAM 容量: 24K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 12x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-LQFP
包裝: 托盤
產(chǎn)品目錄頁面: 732 (CN2011-ZH PDF)
配用: TWR-MCF51CN-ND - KIT TOWER BOARD
TWR-MCF51CN-KIT-ND - KIT TOWER BOARD/SERIAL/ELEVATOR
MCF51CN128 ColdFire Microcontroller Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor
14
3.5
ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early CMOS circuits,
normal handling precautions should be used to avoid exposure to static discharge. Qualification tests are performed to ensure
that these devices can withstand exposure to reasonable levels of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits. During
the device qualification ESD stresses were performed for the human body model (HBM), the machine model (MM) and the
charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete
DC parametric and functional testing is performed per the applicable device specification at room temperature followed by hot
temperature, unless specified otherwise in the device specification.
Table 6. ESD and Latch-up Test Conditions
Model
Description
Symbol
Value
Unit
Human
Body
Series resistance
R1
1500
Ω
Storage capacitance
C
100
pF
Number of pulses per pin
3
Machine
Series resistance
R1
0
Ω
Storage capacitance
C
200
pF
Number of pulses per pin
3
Latch-up
Minimum input voltage limit
– 2.5
V
Maximum input voltage limit
7.5
V
Table 7. ESD and Latch-Up Protection Characteristics
No.
Rating1
1 Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
Symbol
Min
Max
Unit
1
Human body model (HBM)
VHBM
± 2000
V
2
Machine model (MM)
VMM
± 200
V
3
Charge device model (CDM)
VCDM
± 500
V
4
Latch-up current at TA = 85°CILAT
± 100
mA
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