參數(shù)資料
型號(hào): MC9SDG128BCPVR2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP112
封裝: 20 X 20 MM, 1.40 MM HEIGHT, 0.65 MM PITCH, LQFP-112
文件頁數(shù): 15/128頁
文件大小: 2002K
代理商: MC9SDG128BCPVR2
MC9S12DT128B Device User Guide — V01.09
109
Figure A-3 Jitter Definitions
The relative deviation of tnom is at its maximum for one clock period, and decreases towards zero for larger
number of clock periods (N).
Defining the jitter as:
For N < 100, the following equation is a good fit for the maximum jitter:
Figure A-4 Maximum bus clock jitter approximation
2
3
N-1
N
1
0
tnom
tmax1
tmin1
tmaxN
tminN
JN
()
max 1
t
max N
()
Nt
nom
---------------------
1
t
min N
()
Nt
nom
---------------------
,
=
J N
()
j
1
N
--------
j
2
+
=
1
5
10
20
N
J(N)
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