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Chapter 13 Periodic Interrupt Timer (S12PIT24B4CV1)
MC9S12XDP512 Data Sheet, Rev. 2.21
548
Freescale Semiconductor
13.3.0.6
PIT Time-Out Flag Register (PITTF)
Read: Anytime
Write: Anytime (write to clear); writes to the reserved bits have no effect
13.3.0.7
PIT Micro Timer Load Register 0 to 1 (PITMTLD0–1)
Read: Anytime
Write: Anytime
76543210
R
0000
PTF3
PTF2
PTF1
PTF0
W
Reset
00000000
= Unimplemented or Reserved
Figure 13-8. PIT Time-Out Flag Register (PITTF)
Table 13-6. PITTF Field Descriptions
Field
Description
3:0
PTF[3:0]
PIT Time-out Flag Bits for Timer Channel 3:0 — PTF is set when the corresponding 16-bit timer modulus
down-counter and the selected 8-bit micro timer modulus down-counter have counted to zero. The ag can be
cleared by writing a one to the ag bit. Writing a zero has no effect. If ag clearing by writing a one and ag setting
happen in the same bus clock cycle, the ag remains set. The ag bits are cleared if the PIT module is disabled
or if the corresponding timer channel is disabled.
0 Time-out of the corresponding PIT channel has not yet occurred.
1 Time-out of the corresponding PIT channel has occurred.
76543210
R
PMTLD7
PMTLD6
PMTLD5
PMTLD4
PMTLD3
PMTLD2
PMTLD1
PMTLD0
W
Reset
00000000
Figure 13-9. PIT Micro Timer Load Register 0 (PITMTLD0)
76543210
R
PMTLD7
PMTLD6
PMTLD5
PMTLD4
PMTLD3
PMTLD2
PMTLD1
PMTLD0
W
Reset
00000000
Figure 13-10. PIT Micro Timer Load Register 1 (PITMTLD1)
Table 13-7. PITMTLD0–1 Field Descriptions
Field
Description
7:0
PMTLD[7:0]
PIT Micro Timer Load Bits 7:0 — These bits set the 8-bit modulus down-counter load value of the micro timers.
Writing a new value into the PITMTLD register will not restart the timer. When the micro timer has counted down
to zero, the PMTLD register value will be loaded. The PFLMT bits in the PITCFLMT register can be used to
immediately update the count register with the new value if an immediate load is desired.