參數(shù)資料
型號: MC9S12E
廠商: Motorola, Inc.
英文描述: MC9S12E-Family Device User Guide V01.04
中文描述: MC9S12E -系列設(shè)備的用戶手冊V01.04
文件頁數(shù): 139/156頁
文件大?。?/td> 3077K
代理商: MC9S12E
139
B.7 ATD Characteristics
This section describes the characteristics of the analog to digital converter.
The ATD is specified and tested for both the 3.3V and 5V range. For ranges between 3.3V and 5V the
ATD accuracy is generally the same as in the 3.3V range but is not tested in this range in production test.
B.7.1 ATD Operating Characteristics - 5V Range
The
Table B-10
shows conditions under which the ATD operates.
The following constraints exist to obtain full-scale, full range results:
VSSA
VRL
VIN
VRH
VDDA
.
This constraint exists since the sample buffer amplifier can not
drive beyond the power supply levels that it ties to. If the input level goes outside of this range it will
effectively be clipped.
Table B-10 5V ATD Operating Characteristics
Conditions are shown in
Table A-4
unless otherwise noted. Supply Voltage 5V-10% <= VDDA <=5V+10%
Num C
Rating
Symbol
Min
Typ
Max
Unit
1
D
Reference Potential
Low
High
VRL
VRH
VSSA
VDDA/2
VDDA/2
VDDA
V
V
2
C Differential Reference Voltage
1
NOTES
:
1. Full accuracy is not guaranteed when differential voltage is less than 4.75V
2. The minimum time assumes a final sample period of 2 ATD clocks cycles while the maximum time assumes a final sample
period of 16 ATD clocks.
3. Reduced accuracy see
Table B-13
and
Table B-14
.
VRH-VRL
4.75
5.0
5.25
V
3
D ATD Clock Frequency
f
ATDCLK
0.5
2.0
MHz
4
D
ATD 10-Bit Conversion Period
Clock Cycles
2
Conv, Time at 2.0MHz ATD Clock f
ATDCLK
Conv, Time at 4.0MHz
3
ATD Clock f
ATDCLK
N
CONV10
T
CONV10
T
CONV10
14
7
3.5
28
14
7
Cycles
μ
s
μ
s
5
D
ATD 8-Bit Conversion Period
Clock Cycles
(1)
Conv, Time at 2.0MHz ATD Clock f
ATDCLK
N
CONV8
T
CONV8
12
6
26
13
Cycles
μ
s
6
D Stop Recovery Time (V
DDA
=5.0 Volts)
t
SR
20
μ
s
7
P Reference Supply current
I
REF
0.375
mA
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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