參數(shù)資料
型號: MC9S12DB128BCFU
廠商: Motorola, Inc.
英文描述: MC9S12DT128B
中文描述: MC9S12DT128B
文件頁數(shù): 11/124頁
文件大?。?/td> 577K
代理商: MC9S12DB128BCFU
MC9S12DT128B Device User Guide — V01.07
11
List of Tables
Table 0-1
Table 0-2
Table 1-1
$0000 - $000F
$0010 - $0014
$0015 - $0016
$0017 - $0017
$0018 - $001B
$001C - $001D MMC map 3 of 4 (Core and Device User Guide,
Table 1-4
) ...................23
$001E - $001E MEBI map 2 of 3 (Core User Guide) ........................................................23
$001F - $001F
INT map 2 of 2 (Core User Guide) ...........................................................23
$0020 - $0027
Reserved ..................................................................................................24
$0028 - $002F
BKP (Core User Guide) ...........................................................................24
$0030 - $0031
MMC map 4 of 4 (Core User Guide) ........................................................24
$0032 - $0033
MEBI map 3 of 3 (Core User Guide) ........................................................24
$0034 - $003F
CRG (Clock and Reset Generator) ..........................................................25
$0040 - $007F
ECT (Enhanced Capture Timer 16 Bit 8 Channels) .................................25
$0080 - $009F
ATD0 (Analog to Digital Converter 10 Bit 8 Channel) ..............................28
$00A0 - $00C7 PWM (Pulse Width Modulator 8 Bit 8 Channel) .......................................29
$00C8 - $00CF SCI0 (Asynchronous Serial Interface) ......................................................31
$00D0 - $00D7 SCI1 (Asynchronous Serial Interface) ......................................................31
$00D8 - $00DF SPI0 (Serial Peripheral Interface) ............................................................32
$00E0 - $00E7 IIC (Inter IC Bus) ......................................................................................32
$00E8 - $00EF BDLC (Byte Level Data Link Controller J1850) ........................................33
$00F0 - $00F7
SPI1 (Serial Peripheral Interface) ............................................................33
$00F8 - $00FF Reserved ..................................................................................................33
$0100 - $010F
Flash Control Register (fts128k2) ............................................................34
$0110 - $011B
EEPROM Control Register (eets2k) ........................................................34
$011C - $011F Reserved for RAM Control Register ........................................................35
$0120 - $013F
ATD1 (Analog to Digital Converter 10 Bit 8 Channel) ..............................35
$0140 - $017F
CAN0 (Motorola Scalable CAN - MSCAN) ..............................................36
Table 1-2
Detailed MSCAN Foreground Receive and Transmit Buffer Layout. . . . . . . . . . .37
$0180 - $01BF CAN1 (Motorola Scalable CAN - MSCAN) ..............................................38
Derivative Differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Document References. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Device Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
MEBI map 1 of 3 (Core User Guide) ........................................................22
MMC map 1 of 4 (Core User Guide) ........................................................22
INT map 1 of 2 (Core User Guide) ...........................................................23
MMC map 2 of 4 (Core User Guide) ........................................................23
Miscellaneous Peripherals (Device User Guide,
Table 1-3
) ....................23
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