參數(shù)資料
型號: MC9S08RD60CDWE
廠商: Freescale Semiconductor
文件頁數(shù): 48/234頁
文件大?。?/td> 0K
描述: IC MCU 60K FLASH 2K RAM 28-SOIC
標準包裝: 26
系列: S08
核心處理器: S08
芯體尺寸: 8-位
速度: 8MHz
連通性: SCI
外圍設(shè)備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 23
程序存儲器容量: 60KB(60K x 8)
程序存儲器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
包裝: 管件
Timer/PWM (TPM)
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Freescale Semiconductor
141
When background mode is active, the timer counter and the coherency mechanism are frozen such that the
buffer latches remain in the state they were in when the background mode became active even if one or
both bytes of the counter are read while background mode is active.
10.7.3
Timer Counter Modulo Registers (TPM1MODH:TPM1MODL)
The read/write TPM modulo registers contain the modulo value for the TPM counter. After the TPM
counter reaches the modulo value, the TPM counter resumes counting from $0000 at the next clock
(CPWMS = 0) or starts counting down (CPWMS = 1), and the overow ag (TOF) becomes set. Writing
to TPM1MODH or TPM1MODL inhibits the TOF bit and overow interrupts until the other byte is
written. Reset sets the TPM counter modulo registers to $0000, which results in a free-running timer
counter (modulo disabled).
It is good practice to wait for an overow interrupt so both bytes of the modulo register can be written well
before a new overow. An alternative approach is to reset the TPM counter before writing to the TPM
modulo registers to avoid confusion about when the rst counter overow will occur.
76543210
R
Bit 15
14
13
12
11
10
9
Bit 8
W
Reset
00000000
Figure 10-8. Timer Counter Modulo Register High (TPM1MODH)
76543210
R
Bit 7
654321
Bit 0
W
Reset
00000000
Figure 10-9. Timer Counter Modulo Register Low (TPM1MODL)
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