參數(shù)資料
型號: MC9S08LL16CLF
廠商: Freescale Semiconductor
文件頁數(shù): 4/44頁
文件大?。?/td> 0K
描述: IC MCU 8BIT 16K FLASH 48-LQFP
產(chǎn)品培訓模塊: LCD Design Solutions
MC9S08LL64/36 LCD MCU Introduction
標準包裝: 250
系列: S08
核心處理器: S08
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SCI,SPI
外圍設備: LCD,LVD,POR,PWM,WDT
輸入/輸出數(shù): 31
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 8x12b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-LQFP
包裝: 托盤
產(chǎn)品目錄頁面: 727 (CN2011-ZH PDF)
MC9S08LL16 Series MCU Data Sheet, Rev. 7
Electrical Characteristics
Freescale Semiconductor
12
where K is a constant pertaining to the particular part. K can be determined from equation 3 by measuring
PD (at equilibrium) for a known TA. Using this value of K, the values of PD and TJ can be obtained by
solving Equation 3-1 and Equation 3-2 iteratively for any value of TA.
3.5
ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions should be taken to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification, ESD stresses were performed for the human body
model (HBM), the machine model (MM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless instructed otherwise in the device
specification.
Table 6. ESD and Latch-up Test Conditions
Model
Description
Symbol
Value
Unit
Human
Body Model
Series resistance
R1
1500
Ω
Storage capacitance
C
100
pF
Number of pulses per pin
3
Charge
Device
Model
Series resistance
R1
0
Ω
Storage capacitance
C
200
pF
Number of pulses per pin
3
Latch-up
Minimum input voltage limit
–2.5
V
Maximum input voltage limit
7.5
V
Table 7. ESD and Latch-Up Protection Characteristics
No.
Rating1
1 Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
Symbol
Min
Max
Unit
1
Human body model (HBM)
VHBM
±2000
V
2
Charge device model (CDM)
VCDM
±500
V
3
Latch-up current at TA = 85°CILAT
±100
mA
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