Chapter 5 Resets, Interrupts, and System Configuration
MC9S08JM60 Series Data Sheet, Rev. 3
Freescale Semiconductor
77
5.7.7
System Power Management Status and Control 1 Register
(SPMSC1)
This high page register contains status and control bits to support the low-voltage detect function, and to
enable the bandgap voltage reference for use by the ADC module. This register must be written during the
user’s reset initialization program to set the desired controls even if the desired settings are the same as the
reset settings.
Table 5-8. SDIDH Register Field Descriptions
Field
Description
7:4
Reserved
Bits 7:4 are reserved. Reading these bits will result in an indeterminate value; writes have no effect.
3:0
ID[11:8]
Part Identification Number — Each derivative in the HCS08 Family has a unique identification number. The
MC9S08JM60 Series is hard coded to the value 0x016. See also ID bits in
Table 5-9.76
54
321
0
R
W
Reset
000
10
110
= Unimplemented or Reserved
Figure 5-8. System Device Identification Register — Low (SDIDL)
Table 5-9. SDIDL Register Field Descriptions
Field
Description
7:0
ID[7:0]
Part Identification Number — Each derivative in the HCS08 Family has a unique identification number. The
MC9S08JM60 Series is hard coded to the value 0x016. See also ID bits in
Table 5-8.76
54
321
0
RLVWF1
0
LVWIE
LVDRE2
LVDSE
LVDE2
0
BGBE
W
LVWACK
Reset:
000
11
100
= Unimplemented or Reserved
1 LVWF will be set in the case when V
Supply transitions below the trip point or after reset and VSupply is already below VLVW.
2 This bit can be written only one time after reset. Additional writes are ignored.
Figure 5-9. System Power Management Status and Control 1 Register (SPMSC1)
