
Analog-to-Digital Converter (S08ADC10V1)
MC9S08AC16 Series Data Sheet, Rev. 8
Freescale Semiconductor
253
14.4.5
Compare Value High Register (ADC1CVH)
This register holds the upper two bits of the 10-bit compare value. These bits are compared to the upper
two bits of the result following a conversion in 10-bit mode when the compare function is enabled.In 8-bit
operation, ADC1CVH is not used during compare.
14.4.6
Compare Value Low Register (ADC1CVL)
This register holds the lower 8 bits of the 10-bit compare value, or all 8 bits of the 8-bit compare value.
Bits ADCV7:ADCV0 are compared to the lower 8 bits of the result following a conversion in either 10-bit
or 8-bit mode.
14.4.7
Configuration Register (ADC1CFG)
ADC1CFG is used to select the mode of operation, clock source, clock divide, and configure for low power
or long sample time.
7
6
5
432
1
0
R
ADR7
ADR6
ADR5
ADR4
ADR3
ADR2
ADR1
ADR0
W
Reset:
0
= Unimplemented or Reserved
Figure 14-7. Data Result Low Register (ADC1RL)
76
54
3
2
10
R0
0
ADCV9
ADCV8
W
Reset:
00
0
00
= Unimplemented or Reserved
Figure 14-8. Compare Value High Register (ADC1CVH)
7
6
5
432
1
0
R
ADCV7
ADCV6
ADCV5
ADCV4
ADCV3
ADCV2
ADCV1
ADCV0
W
Reset:
0
Figure 14-9. Compare Value Low Register(ADC1CVL)