參數(shù)資料
型號: MC9328MX1VM20R2
廠商: Freescale Semiconductor
文件頁數(shù): 19/100頁
文件大小: 0K
描述: IC MCU I.MX 200MHZ 256-MAPBGA
標(biāo)準(zhǔn)包裝: 1,000
系列: i.MX1
核心處理器: ARM9
芯體尺寸: 32-位
速度: 200MHz
連通性: EBI/EMI,I²C,MMC,智能卡,SPI,SSI,UART/USART,USB
外圍設(shè)備: DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 110
程序存儲器類型: ROMless
電壓 - 電源 (Vcc/Vdd): 1.7 V ~ 3.3 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 256-MAPBGA
包裝: 帶卷 (TR)
Functional Description and Application Information
MC9328MX1 Technical Data, Rev. 7
Freescale Semiconductor
25
4
Functional Description and Application Information
This section provides the electrical information including and timing diagrams for the individual modules
of the i.MX1.
4.1
Embedded Trace Macrocell
All registers in the ETM9 are programmed through a JTAG interface. The interface is an extension of the
ARM920T processor’s TAP controller, and is assigned scan chain 6. The scan chain consists of a 40-bit
shift register comprised of the following:
32-bit data field
7-bit address field
A read/write bit
The data to be written is scanned into the 32-bit data field, the address of the register into the 7-bit address
field, and a 1 into the read/write bit.
A register is read by scanning its address into the address field and a 0 into the read/write bit. The 32-bit
data field is ignored. A read or a write takes place when the TAP controller enters the UPDATE-DR state.
The timing diagram for the ETM9 is shown in Figure 2. See Table 9 for the ETM9 timing parameters used
Figure 2. Trace Port Timing Diagram
EXTAL16M input jitter (peak to peak) 1
–TBD
TBD
EXTAL16M startup time 1
TBD
1 The 16 MHz oscillator is not recommended for use in new designs.
Table 8. 32k/16M Oscillator Signal Timing (Continued)
Parameter
Minimum
RMS
Maximum
Unit
TRACECLK
4b
4a
3b
2a
1
Output Trace Port
3a
Valid Data
2b
TRACECLK
(Half-Rate Clocking Mode)
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