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參數(shù)資料
| 型號： | MC9328MX1 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | i.MX Integrated Portable System Processor |
| 中文描述： | i.MX處理器集成的便攜式系統(tǒng) |
| 文件頁數(shù)： | 90/96頁 |
| 文件大小： | 1495K |
| 代理商： | MC9328MX1 |
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MC9328MX1 Advance Information, Rev. 4
90
Freescale Semiconductor
Specifications
The limitation on pixel clock rise time / fall time are not specified. It should be calculated from the hold time and
setup time, according to:
Rising-edge latch data
max rise time allowed = (positive duty cycle - hold time)
max fall time allowed = (negative duty cycle - setup time)
In most of case, duty cycle is 50 / 50, therefore
max rise time = (period / 2 - hold time)
max fall time = (period / 2 - setup time)
For example: Given pixel clock period = 10ns, duty cycle = 50 / 50, hold time = 1ns, setup time = 1ns.
positive duty cycle = 10 / 2 = 5ns
=> max rise time allowed = 5 - 1 = 4ns
negative duty cycle = 10 / 2 = 5ns
=> max fall time allowed = 5 - 1 = 4ns
Falling-edge latch data
max fall time allowed = (negative duty cycle - hold time)
max rise time allowed = (positive duty cycle - setup time)
3.22.2 Non-Gated Clock Mode
Figure 70 shows the timing diagram when the CMOS sensor output data is configured for negative edge and the
CSI is programmed to received data on the positive edge. Figure 71 on page 91 shows the timing diagram when the
CMOS sensor output data is configured for positive edge and the CSI is programmed to received data in negative
edge. The parameters for the timing diagrams are listed in Table 43 on page 91.
4
csi_d hold time
1
–
ns
5
csi_pixclk high time
10.42
–
ns
6
csi_pixclk low time
10.42
–
ns
7
csi_pixclk frequency
0
48
MHz
Table 42. Gated Clock Mode Timing Parameters (Continued)
Ref No.
Parameter
Minimum
Maximum
Unit
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC9328MX1/D | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:i.MX Integrated Portable System Processor |
| MC9328MX1_06 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MX Family of applications processors |
| MC9328MX1CVH15 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:i.MX Integrated Portable System Processor |
| MC9328MX1CVM15 | 功能描述:處理器 - 專門應(yīng)用 DRAGONBALL MX1 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| MC9328MX1CVM15R2 | 功能描述:處理器 - 專門應(yīng)用 DRAGONBALL MX1 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
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