
Multi-Master IIC Interface (MMIIC)
Data Sheet
MC68HC908SR12MC68HC08SR12 — Rev. 5.0
294
Multi-Master IIC Interface (MMIIC)
Freescale Semiconductor
Table 17-1. Pin Name Conventions
MMIIC Generic Pin Names:
Full MCU Pin Names:
Pin Selected for MMIIC Function By:
SDA0
PTB0/SDA0
MMEN and SDASCL1 bits in MMCR1 ($0049)
SCL0
PTB1/SCL0
SDA1
PTB2/SDA1/TxD
ENSCI bit in SCC1 ($0013);
MMEN and SDASCL1 bits in MMCR1 ($0049)
SCL1
PTB3/SCL1/RxD
Addr.
Register Name
Bit 7
654321
Bit 0
$0048
MMIIC Address Register
(MMADR)
Read:
MMAD7
MMAD6
MMAD5
MMAD4
MMAD3
MMAD2
MMAD1
MMEXTAD
Write:
Reset:
10100000
$0049
MMIIC Control Register 1
(MMCR1)
Read:
MMEN
MMIEN
00
MMTXAK REPSEN MMCRCBYTE SDASCL1
Write:
MMCLRBB
Reset:
00000000
$004A
MMIIC Control Register 2
(MMCR2)
Read: MMALIF MMNAKIF
MMBB
MMAST
MMRW
00
MMCRCEF
Write:
0
Reset:
0000000
Unaffected
$004B
MMIIC Status Register
(MMSR)
Read: MMRXIF
MMTXIF
MMATCH
MMSRW MMRXAK MMCRCBF MMTXBE MMRXBF
Write:
0
Reset:
00001010
$004C
MMIIC Data Transmit
Register
(MMDTR)
Read:
MMTD7
MMTD6
MMTD5
MMTD4
MMTD3
MMTD2
MMTD1
MMTD0
Write:
Reset:
00000000
$004D
MMIIC Data Receive
Register
(MDDRR)
Read: MMRD7
MMRD6
MMRD5
MMRD4
MMRD3
MMRD2
MMRD1
MMRD0
Write:
Reset:
00000000
$004E
MMIIC CRC Data Register
(MMCRDR)
Read: MMCRCD7 MMCRCD6 MMCRCD5 MMCRCD4 MMCRCD3 MMCRCD2 MMCRCD1 MMCRCD0
Write:
Reset:
00000000
$004F
MMIIC Frequency Divider
Register
(MMFDR)
Read:
00000
MMBR2
MMBR1
MMBR0
Write:
Reset:
00000100
= Unimplemented
Figure 17-1. MMIIC I/O Register Summary