
Multi-Master IIC Interface (MMIIC)
Multi-Master IIC Registers
MC68HC908LJ24/LK24 — Rev. 2.1
Data Sheet
Freescale Semiconductor
Multi-Master IIC Interface (MMIIC)
321
15.5 Multi-Master IIC Registers
Six registers are associated with the Multi-master IIC module, they are
outlined in the following sections.
15.5.1 Multi-Master IIC Address Register (MMADR)
Addr.
Register Name
Bit 7
654321
Bit 0
$006A
Multi-Master IIC
Master Control Register
(MIMCR)
Read: MMALIF MMNAKIF
MMBB
MMAST
MMRW
MMBR2
MMBR1
MMBR0
Write:
0
Reset:
00000000
$006B
Multi-Master IIC Address
Register
(MMADR)
Read:
MMAD7
MMAD6
MMAD5
MMAD4
MMAD3
MMAD2
MMAD1 MMEXTAD
Write:
Reset:
10100000
$006C
Multi-Master IIC Control
Register
(MMCR)
Read:
MMEN
MMIEN
00
MMTXAK REPSEN
00
Write:
Reset:
00000000
$006D
Multi-Master IIC
Status Register
(MMSR)
Read: MMRXIF MMTXIF MMATCH MMSRW MMRXAK
0
MMTXBE MMRXBF
Write:
0
Reset:
00001010
$006E
Multi-Master IIC
Data Transmit Register
(MMDTR)
Read:
MMTD7
MMTD6
MMTD5
MMTD4
MMTD3
MMTD2
MMTD1
MMTD0
Write:
Reset:
11111111
$006F
Multi-Master IIC
Data Receive Register
(MMDRR)
Read: MMRD7
MMRD6
MMRD5
MMRD4
MMRD3
MMRD2
MMRD1
MMRD0
Write:
Reset:
00000000
= Unimplemented
Figure 15-1. MMIIC I/O Register Summary
Address: $006B
Bit 7
654321
Bit 0
Read:
MMAD7
MMAD6
MMAD5
MMAD4
MMAD3
MMAD2
MMAD1 MMEXTAD
Write:
Reset:
10100000
Figure 15-2. Multi-Master IIC Address Register (MMADR)