
Timer Interface Module (TIM1)
MC68HC908GR60A MC68HC908GR48A MC68HC908GR32A Data Sheet, Rev. 5
236
Freescale Semiconductor
17.8.3 TIM1 Counter Modulo Registers
The read/write TIM1 modulo registers contain the modulo value for the TIM1 counter. When the TIM1
counter reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM1 counter resumes
counting from $0000 at the next timer clock. Writing to the high byte (T1MODH) inhibits the TOF bit and
overflow interrupts until the low byte (T1MODL) is written. Reset sets the TIM1 counter modulo registers.
NOTE
Reset the TIM1 counter before writing to the TIM1 counter modulo registers.
17.8.4 TIM1 Channel Status and Control Registers
Each of the TIM1 channel status and control registers does the following:
Flags input captures and output compares
Enables input capture and output compare interrupts
Selects input capture, output compare, or PWM operation
Selects high, low, or toggling output on output compare
Selects rising edge, falling edge, or any edge as the active input capture trigger
Selects output toggling on TIM1 overflow
Selects 0% and 100% PWM duty cycle
Selects buffered or unbuffered output compare/PWM operation
Address: $0023
T1MODH
Bit 7
654321
Bit 0
Read:
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
Write:
Reset:
11111111
Address: $0024
T1MODL
Bit 7
654321
Bit 0
Read:
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Write:
Reset:
11111111
Figure 17-7. TIM1 Counter Modulo Registers (T1MODH:T1MODL)