
Memory
MC68HC908GR60A MC68HC908GR48A MC68HC908GR32A Data Sheet, Rev. 5
36
Freescale Semiconductor
$003C
ADC Status and Control
Register (ADSCR)
Read:
COCO
AIEN
ADCO
ADCH4
ADCH3
ADCH2
ADCH1
ADCH0
Write:
R
Reset:
0001111
1
$003D
ADC Data High Register
(ADRH)
Read:
000000
AD9
AD8
Write:
Reset:
Unaffected by reset
$003E
ADC Data Low Register
(ADRL)
Read:
AD7
AD6
AD5
AD4
A3
AD2
AD1
AD0
Write:
Reset:
Unaffected by reset
$003F
ADC Clock Register
(ADCLK)
Read:
ADIV2
ADIV1
ADIV0
ADICLK
MODE1
MODE0
R
0
Write:
Reset:
0000010
0
$0440
Port F Data Register
(PTF)
Read:
PTF7
PTF6
PTF5
PTF4
PTAF3
PTF2
PTF1
PTF0
Write:
Reset:
Unaffected by reset
$0441
Port G Data Register
(PTG)
Read:
PTG7
PTG6
PTG5
PTG4
PTG3
PTG2
PTG1
PTG0
Write:
Reset:
Unaffected by reset
$0444
Data Direction Register F
(DDRF)
Read:
DDRF7
DDRF6
DDRF5
DDRF4
DDRF3
DDRF2
DDRF1
DDRF0
Write:
Reset:
0000000
0
$0445
Data Direction Register G
(DDRG)
Read:
DDRG7
DDRG6
DDRG5
DDRG4
DDRG3
DDRG2
DDRG1
DDRG0
Write:
Reset:
0000000
0
$0448
Keyboard Interrupt
Polarity Register
(INTKBIPR)
Read:
KBIP7
KBIP6
KBIP5
KBIP4
KBIP3
KBIP2
KBIP1
KBIP0
Write:
Reset:
0000000
0
$0456
TIM2 Channel 2 Status and
Control Register (T2SC2)
Read:
CH2F
CH2IE
MS2B
MS2A
ELS2B
ELS2A
TOV2
CH2MAX
Write:
0
Reset:
0000000
0
$0457
TIM2 Channel 2
Register High (T2CH2H)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
Indeterminate after reset
$0458
TIM2 Channel 2
Register Low (T2CH2L)
Read:
Bit 7
654321
Bit 0
Write:
Reset:
Indeterminate after reset
Addr.
Register Name
Bit 7
654321
Bit 0
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 6 of 9)