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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� MC908EY8CFAE
寤犲晢锛� Freescale Semiconductor
鏂囦欢闋佹暩(sh霉)锛� 161/278闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC MCU 8K FLASH 8MHZ 32-LQFP
妯欐簴鍖呰锛� 250
绯诲垪锛� HC08
鏍稿績铏曠悊鍣細 HC08
鑺珨灏哄锛� 8-浣�
閫熷害锛� 8MHz
閫ｉ€氭€э細 LIN锛孲CI锛孲PI
澶栧湇瑷倷锛� POR锛孭WM
杓稿叆/杓稿嚭鏁�(sh霉)锛� 24
绋嬪簭瀛樺劜鍣ㄥ閲忥細 8KB锛�8K x 8锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
RAM 瀹归噺锛� 512 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 4.5 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞夋彌鍣細 A/D 8x10b
鎸暕鍣ㄥ瀷锛� 鍏ч儴
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 32-LQFP
鍖呰锛� 鎵樼洡
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DC Electrical Characteristics
MC68HC908EY16 MC68HC908EY8 Data Sheet, Rev. 10
Freescale Semiconductor
243
VDD + VDDA supply current
Run(4),(5)
Wait(5), (6)
Stop (LVI off) @ 25
掳C(7)
Stop (LVI on) @ 25
掳C
Stop (LVI off), 鈥�40
掳C to 135掳C
Stop (LVI on), 鈥�40
掳C to 135掳C
IDD
鈥�
18
5.2
0.83
0.19
3.0
0.19
25
7.0
2.00
0.24
30
0.30
mA
A
mA
A
mA
I/O ports Hi-Z leakage current(8)
IIL
鈥�1
鈥�
+1
A
Input current 鈥� RST, OSC1
IIn
鈥�1
鈥�
+1
A
Capacitance
Ports (as input or output)
COut
CIn
鈥�
12
8
pF
POR rearm voltage(9)
VPOR
0鈥�
100
mV
POR reset voltage(10)
VPOR
0
700
800
mV
POR rise time ramp rate
RPOR
0.035
鈥�
V/ms
Monitor mode entry voltage
VTST
VDD+ 3.5
VDD+ 4.5
V
Low-voltage inhibit reset, trip falling voltage(11)
VTRIPF
3.90
4.30
4.50
V
Low-voltage inhibit reset, trip rising voltage(12)
VTRIPR
4.00
4.40
4.60
V
Low-voltage inhibit reset/recover hysteresis(13)
VHYS
鈥�0.09鈥�
V
Pullup resistor 鈥� PTA0鈥揚TA6/SS(14), IRQ, RST
RPU
24
鈥�
48
k
1. VDD = 5.5 Vdc to 4.5 Vdc, VSS = 0 Vdc, TA = 鈥�40掳C to +135掳C, unless otherwise noted
2. Typical values reflect average measurements at midpoint of voltage range, 25
掳C only.
3. Some disturbance of the ADC accuracy is possible during any injection event and is dependent on board layout and power
supply decoupling.
4. Run (operating) IDD measured using internal oscillator at its 32-MHz rate. VDD = 5.5 Vdc. All inputs 0.2 V from rail. No dc
loads. Less than 100 pF on all outputs. All ports configured as inputs. Measured with all modules enabled.
5. All measurements taken with LVI enabled.
6. Wait IDD measured using internal oscillator at its 1-MHz rate. All inputs 0.2 V from rail; no dc loads; less than 100 pF on all
outputs. All ports configured as inputs.
7. Stop IDD is measured with no port pin sourcing current; all modules are disabled. OSCSTOPEN option is not selected.
8. Pullups and pulldowns are disabled.
9. Maximum is highest voltage that power-on reset (POR) is guaranteed.
10. Maximum is highest voltage that POR is possible.
11. These values assume the LVI is operating in 5-V mode (i.e. LVI5OR3 bit is set to 1).
For 3-V mode (LVI5OR3 = 0), values become Min: 2.45, Typ: 2.60, Max: 2.80
12. These values assume the LVI is operating in 5-V mode (i.e. LVI5OR3 bit is set to 1).
For 3-V mode (LVI5OR3 = 0), values become Min: 2.55, Typ: 2.66, Max: 2.80
13. These values assume the LVI is operating in 5-V mode (i.e. LVI5OR3 bit is set to 1).
For 3-V mode (LVI5OR3 = 0), values become Typ: 60
14. PTA0鈥揚TA4 pullup resistors are for interrupts only and are only enabled when the keyboard is in use.
Characteristic(1)
Symbol
Min
Typ(2)
Max
Unit
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鍙冩暩(sh霉)鎻忚堪
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MC908EY8CFAR2 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 8 BIT MCU 8K FLASH RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
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MC908EY8MFAER 鍔熻兘鎻忚堪:IC MCU 8K FLASH 8MHZ 32-LQFP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - 寰帶鍒跺櫒锛� 绯诲垪:HC08 妯欐簴鍖呰:1 绯诲垪:87C 鏍稿績铏曠悊鍣�:MCS 51 鑺珨灏哄:8-浣� 閫熷害:16MHz 閫ｉ€氭€�:SIO 澶栧湇瑷倷:- 杓稿叆/杓稿嚭鏁�(sh霉):32 绋嬪簭瀛樺劜鍣ㄥ閲�:8KB锛�8K x 8锛� 绋嬪簭瀛樺劜鍣ㄩ鍨�:OTP EEPROM 澶у皬:- RAM 瀹归噺:256 x 8 闆诲 - 闆绘簮 (Vcc/Vdd):4 V ~ 6 V 鏁�(sh霉)鎿�(j霉)杞夋彌鍣�:- 鎸暕鍣ㄥ瀷:澶栭儴 宸ヤ綔婧害:0°C ~ 70°C 灏佽/澶栨:44-DIP 鍖呰:绠′欢 鍏跺畠鍚嶇ū:864285
MC908EY8VFAE 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 8 BIT MCU 8K FLASH RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
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