
MC68HC908EY16A MC68HC908EY8A Data Sheet, Rev. 2
126
Freescale Semiconductor
Figure 12-6. Port B I/O Circuit
When DDRBx is a 1, reading address $0001 reads the PTBx data latch. When DDRBx is a 0, reading
address $0001 reads the voltage level on the pin. The data latch can always be written, regardless of the
state of its data direction bit.
Table 12-2 summarizes the operation of the port B pins.
12.4 Port C
Port C is an 5-bit general-purpose bidirectional I/O port that shares pin functions with the internal clock
generator (ICG) and serial peripheral interface (SPI) modules.
12.4.1 Port C Data Register
The port C data register contains a data latch for each of the five port C pins.
Table 12-2. Port B Pin Functions
DDRB
Bit
PTB
Bit
I/O Pin
Mode
Accesses to DDRB
Accesses to PTB
Read/Write
Read
Write
0
X
Input, Hi-Z
DDRB[7:0]
Pin
PTB[7:0](1)
1
X
Output
DDRB[7:0]
PTB[7:0]
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
Address:
$0002
Bit 7
6
5
4321
Bit 0
Read:
0
PTC4
PTC3
PTC2
PTC1
PTC0
Write:
Reset:
Unaffected by reset
Alternative Function:
OSC1
OSC2
MCLK
MOSI
MISO
Alternative Function:
SS
= Unimplemented
Figure 12-7. Port C Data Register (PTC)
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
READ PTB ($0001)
PTBx
DDRBx
PTBx
INTERNAL
DAT
ABU
S