
FLASH Memory (FLASH)
MC68HC908AS32A Data Sheet, Rev. 2.0
Freescale Semiconductor
57
Figure 2-14. FLASH Programming Algorithm Flowchart
SET HVEN BIT
READ THE FLASH BLOCK
WAIT FOR A TIME, tNVS
SET PGM BIT
WAIT FOR A TIME, tPGS
WRITE DATA TO THE FLASH ADDRESS
TO BE PROGRAMMED
WAIT FOR A TIME, tPROG
CLEAR PGM BIT
WAIT FOR A TIME, tNVH
CLEAR HVEN BIT
WAIT FOR A TIME, tRCV
COMPLETED
PROGRAMMING
THIS ROW?
Y
N
END OF PROGRAMMING
The time between each FLASH address change (step 7 to step 7), or
must not exceed the maximum programming
time, tPROG maximum.
the time between the last FLASH address programmed
to clearing PGM bit (step 7 to step 10)
Notes:
1
2
3
4
5
6
7
8
10
11
12
13
Algorithm for Programming
a Row (64 Bytes) of FLASH Memory
This row program algorithm assumes the row/s
to be programmed are initially erased.
PROTECT REGISTER
WRITE ANY DATA TO ANY
FLASH ADDRESS WITHIN THE
ROW ADDRESS RANGE DESIRED