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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� MC908AP8CFBE
寤犲晢锛� Freescale Semiconductor
鏂囦欢闋佹暩(sh霉)锛� 265/324闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC MCU 8K FLASH 8MHZ 44QFP
妯欐簴鍖呰锛� 96
绯诲垪锛� HC08
鏍稿績铏曠悊鍣細 HC08
鑺珨灏哄锛� 8-浣�
閫熷害锛� 8MHz
閫i€氭€э細 I²C锛孖RSCI锛孲CI锛孲PI
澶栧湇瑷倷锛� LED锛孡VD锛孭OR锛孭WM
杓稿叆/杓稿嚭鏁�(sh霉)锛� 32
绋嬪簭瀛樺劜鍣ㄥ閲忥細 8KB锛�8K x 8锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
RAM 瀹归噺锛� 1K x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 2.7 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 8x10b
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 44-QFP
鍖呰锛� 鎵樼洡
鐢�(ch菐n)鍝佺洰閷勯爜闈細 725 (CN2011-ZH PDF)
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FLASH Memory
MC68HC908AP Family Data Sheet, Rev. 4
Freescale Semiconductor
45
10.
Wait for time, tnvh (5 s).
11.
Clear the HVEN bit.
12.
After time, trcv (1 s), the memory can be accessed in read mode again.
This program sequence is repeated throughout the memory until all data is programmed.
NOTE
The time between each FLASH address change (step 6 to step 6), or the
time between the last FLASH addressed programmed to clearing the PGM
bit (step 6 to step 9), must not exceed the maximum programming time,
tprog max.
NOTE
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps.
2.5.6 FLASH Protection
Due to the ability of the on-board charge pump to erase and program the FLASH memory in the target
application, provision is made to protect pages of memory from unintentional erase or program operations
due to system malfunction. This protection is done by use of a FLASH block protect register (FLBPR).
The FLBPR determines the range of the FLASH memory which is to be protected. The range of the
protected area starts from a location defined by FLBPR and ends to the bottom of the FLASH memory
($FFFF). When the memory is protected, the HVEN bit cannot be set in either erase or program
operations.
NOTE
The mask option register ($FFCF) and the 48 bytes of user interrupt vectors
($FFD0鈥�$FFFF) are always protected, regardless of the value in the
FLASH block protect register. A mass erase is required to erase these
locations.
鐩搁棞PDF璩囨枡
PDF鎻忚堪
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鐩搁棞浠g悊鍟�/鎶€琛撳弮鏁�(sh霉)
鍙冩暩(sh霉)鎻忚堪
MC908AP8CFBER 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU MCU 8K FLASH 10 BIT ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
MC908AS32ACFNE 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32K FLASH RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
MC908AS32ACFNER 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32K FLASH RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
MC908AS32ACFNR2 鍒堕€犲晢:Motorola Inc 鍔熻兘鎻忚堪:
MC908AS32AMFN 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪:- Bulk 鍒堕€犲晢:Motorola Inc 鍔熻兘鎻忚堪: