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| 型號(hào)： | MC8641HX1333JE |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 54/130頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DUAL CORE PROCESSOR 994-CBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MPC86xx |
| 處理器類(lèi)型： | 32-位 MPC86xx PowerPC |
| 速度： | 1.333GHz |
| 電壓： | 1.05V |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 994-BCBGA，F(xiàn)CCBGA |
| 供應(yīng)商設(shè)備封裝： | 994-FCCBGA（33x33） |
| 包裝： | 托盤(pán) |
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MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
3
Overview
1.1
Key Features
The following lists an overview of the MPC8641 key feature set:
Major features of the e600 core are as follows:
— High-performance, 32-bit superscalar microprocessor that implements the PowerPC ISA
— Eleven independent execution units and three register files
– Branch processing unit (BPU)
– Four integer units (IUs) that share 32 GPRs for integer operands
– 64-bit floating-point unit (FPU)
– Four vector units and a 32-entry vector register file (VRs)
– Three-stage load/store unit (LSU)
— Three issue queues, FIQ, VIQ, and GIQ, can accept as many as one, two, and three instructions,
respectively, in a cycle.
— Rename buffers
— Dispatch unit
— Completion unit
— Two separate 32-Kbyte instruction and data level 1 (L1) caches
— Integrated 1-Mbyte, eight-way set-associative unified instruction and data level 2 (L2) cache
with ECC
— 36-bit real addressing
— Separate memory management units (MMUs) for instructions and data
— Multiprocessing support features
— Power and thermal management
— Performance monitor
— In-system testability and debugging features
— Reliability and serviceability
MPX coherency module (MCM)
— Ten local address windows plus two default windows
— Optional low memory offset mode for core 1 to allow for address disambiguation
Address translation and mapping units (ATMUs)
— Eight local access windows define mapping within local 36-bit address space
— Inbound and outbound ATMUs map to larger external address spaces
— Three inbound windows plus a configuration window on PCI Express
— Four inbound windows plus a default window on serial RapidIO
— Four outbound windows plus default translation for PCI Express
— Eight outbound windows plus default translation for serial RapidIO with segmentation and
sub-segmentation support
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC8641HX1333K | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications |
| MC8641HX1333N | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications |
| MC8641HX1500G | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications |
| MC8641HX1500H | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications |
| MC8641HX1500J | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications |
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