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參數資料
| 型號： | MC8641DVU1250JB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROPROCESSOR, CBGA1023 |
| 封裝： | 33 X 33 MM, ROHS COMPLIANT, CERAMIC, BGA-1023 |
| 文件頁數： | 108/140頁 |
| 文件大小： | 1484K |
| 代理商： | MC8641DVU1250JB |
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MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
7
Electrical Characteristics
2.1.2
Recommended Operating Conditions
Table 2 provides the recommended operating conditions for the MPC8641. Note that the values in Table 2
are the recommended and tested operating conditions. Proper device operation outside of these conditions
is not guaranteed. For details on order information and specific operating conditions for parts, see
Storage temperature range
TSTG
-55 to 150
°C
Notes:
1. Functional and tested operating conditions are given in Table 2. Absolute maximum ratings are stress ratings only, and
functional operation at the maxima is not guaranteed. Stresses beyond those listed may affect device reliability or cause
permanent damage to the device.
2. Core 1 characteristics apply only to MPC8641D. If two separate power supplies are used for VDD_Core0 and VDD_Core1,
they must be kept within 100 mV of each other during normal run time.
3. The -0.3 to 2.75 V range is for DDR and -0.3 to 1.98 V range is for DDR2.
4. The 3.63V maximum is only supported when the port is configured in GMII, MII, RMII, or TBI modes; otherwise the 2.75V
maximum applies. See Section 8.2, “FIFO, GMII, MII, TBI, RGMII, RMII, and RTBI AC Timing Specifications” for details on
the recommended operating conditions per protocol.
5. During run time (M,L,T,O)VIN and Dn_MVREF may overshoot/undershoot to a voltage and for a maximum duration as
shown in Figure 2.
Table 2. Recommended Operating Conditions
Characteristic
Symbol
Recommended
Value
Unit
Notes
Cores supply voltages
VDD_Core0,
VDD_Core1
1.10 ± 50 mV
V
1, 2, 8
1.05 ± 50 mV
1, 2, 7
0.95 ± 50 mV
1, 2, 12
Cores PLL supply
AVDD_Core0,
AVDD_Core1
1.10 ± 50 mV
V
8, 13
1.05 ± 50 mV
7, 13
0.95 ± 50 mV
12, 13
SerDes Transceiver Supply (Ports 1 and 2)
SVDD
1.10 ± 50 mV
V
8, 11
1.05 ± 50 mV
7, 11
SerDes Serial I/O Supply Port 1
XVDD_SRDS1
1.10 ± 50 mV
V
8
1.05 ± 50 mV
7
SerDes Serial I/O Supply Port 2
XVDD_SRDS2
1.10 ± 50 mV
V
8
1.05 ± 50 mV
7
SerDes DLL and PLL supply voltage for Port 1 and Port 2
AVDD_SRDS1,
AVDD_SRDS2
1.10 ± 50 mV
V
8
1.05 ± 50 mV
7
Platform Supply voltage
VDD_PLAT
1.10 ± 50 mV
V
8
1.05 ± 50 mV
7
Table 1. Absolute Maximum Ratings1 (continued)
Characteristic
Symbol
Absolute Maximum
Value
Unit
Notes
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