參數(shù)資料
型號： MC8640DVU1250HE
廠商： Freescale Semiconductor
文件頁數(shù)： 96/130頁
文件大?。?/td> 0K
描述： IC MPU DUAL CORE E600 1023FCCBGA
標準包裝： 1
系列： MPC86xx
處理器類型： 32-位 MPC86xx PowerPC
速度： 1.25GHz
電壓： 1.05V
安裝類型： 表面貼裝
封裝/外殼： 1023-BCBGA，F(xiàn)CCBGA
供應商設備封裝： 1023-FCCBGA（33x33）
包裝： 托盤
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
68
Freescale Semiconductor
PCI Express
14 PCI Express
This section describes the DC and AC electrical specifications for the PCI Express bus of the MPC8640.
14.1
DC Requirements for PCI Express SD
n_REF_CLK and
SD
n_REF_CLK
For more information, see Section 13.2, “SerDes Reference Clocks.”
14.2
AC Requirements for PCI Express SerDes Clocks
Table 48 lists AC requirements.
14.3
Clocking Dependencies
The ports on the two ends of a link must transmit data at a rate that is within 600 parts per million (ppm)
of each other at all times. This is specified to allow bit rate clock sources with a ± 300 ppm tolerance.
14.4
Physical Layer Specifications
The following is a summary of the specifications for the physical layer of PCI Express on this device. For
further details as well as the specifications of the transport and data link layer please use the PCI Express
Base Specification, Rev. 1.0a document.
14.4.1
Differential Transmitter (Tx) Output
Table 49 defines the specifications for the differential output at all transmitters. The parameters are
specified at the component pins.
Table 48. SD
n_REF_CLK and SDn_REF_CLK AC Requirements
Parameter
Symbol
Min
Typical
Max
Units
Notes
REFCLK cycle time
tREF
—10
—
ns
—
REFCLK cycle-to-cycle jitter. Difference in the period of any two
adjacent REFCLK cycles
tREFCJ
——
100
ps
—
Phase jitter. Deviation in edge location with respect to mean edge
location
tREFPJ
–50
—
50
ps
—
Table 49. Differential Transmitter Output Specifications
Parameter
Symbol
Min
Nom
Max
Units
Notes
Unit Interval
UI
399.88
400
400.12
ps
Each UI is 400 ps ± 300 ppm. UI does not account for
spread spectrum clock dictated variations. See Note 1.
Differential
Peak-to-Peak
Output Voltage
VTX-DIFFp-p
0.8
—
1.2
V
VTX-DIFFp-p = 2 × |VTX-D+ –VTX-D-| See Note 2.
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