參數資料
型號: MC8640DHX1067NE
廠商: Freescale Semiconductor
文件頁數: 76/130頁
文件大?。?/td> 0K
描述: IC DUAL CORE PROCESSOR 1023-CBGA
標準包裝: 1
系列: MPC86xx
處理器類型: 32-位 MPC86xx PowerPC
速度: 1.067GHz
電壓: 0.95V
安裝類型: 表面貼裝
封裝/外殼: 1023-BCBGA,FCCBGA
供應商設備封裝: 1023-FCCBGA(33x33)
包裝: 托盤
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
Freescale Semiconductor
5
Overview
— Allows processors to interrupt each other with 32b messages
— Support for PCI-Express message-shared interrupts (MSIs)
Local bus controller (LBC)
— Multiplexed 32-bit address and data operating at up to 125 MHz
— Eight chip selects support eight external slaves
Integrated DMA controller
— Four-channel controller
— All channels accessible by both the local and the remote masters
— Supports transfers to or from any local memory or I/O port
— Ability to start and flow control each DMA channel from external 3-pin interface
Device performance monitor
— Supports eight 32-bit counters that count the occurrence of selected events
— Ability to count up to 512 counter-specific events
— Supports 64 reference events that can be counted on any of the 8 counters
— Supports duration and quantity threshold counting
— Burstiness feature that permits counting of burst events with a programmable time between
bursts
— Triggering and chaining capability
— Ability to generate an interrupt on overflow
Dual I2C controllers
— Two-wire interface
— Multiple master support
— Master or slave I2C mode support
— On-chip digital filtering rejects spikes on the bus
Boot sequencer
— Optionally loads configuration data from serial ROM at reset via the I2C interface
— Can be used to initialize configuration registers and/or memory
— Supports extended I2C addressing mode
— Data integrity checked with preamble signature and CRC
DUART
— Two 4-wire interfaces (SIN, SOUT, RTS, CTS)
— Programming model compatible with the original 16450 UART and the PC16550D
IEEE 1149.1-compliant, JTAG boundary scan
Available as 1023 pin Hi-CTE flip chip ceramic ball grid array (FC-CBGA)
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