參數(shù)資料
型號(hào)： MC8610TPX1066JB
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 46/96頁(yè)
文件大?。?/td> 0K
描述： MPU E600 CORE 1066MHZ 783-PBGA
標(biāo)準(zhǔn)包裝： 36
系列： MPC86xx
處理器類型： 32-位 MPC86xx PowerPC
速度： 1.066GHz
電壓： 1V
安裝類型： 表面貼裝
封裝/外殼： 783-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 783-FCPBGA（29x29）
包裝： 托盤
MPC8610 Integrated Host Processor Hardware Specifications, Rev. 2
Electrical Characteristics
Freescale Semiconductor
50
2.15
Serial Peripheral Interface (SPI)
This section describes the DC and AC electrical specifications for the SPI interface of the MPC8610.
2.15.1
SPI DC Electrical Characteristics
Table 43 provides the SPI DC electrical characteristics.
2.15.2
SPI AC Timing Specifications
Table 44 provides the SPI input and output AC timing specifications.
Table 43. SPI DC Electrical Characteristics
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage
VIL
– 0.3
0.8
V
Input current (VIN
1 = 0 V or V
IN = VDD)IIN
—±5
μA
High-level output voltage (OVDD = mn, IOH = –100 μA)
VOH
OVDD – 0.2
—
V
Low-level output voltage (OVDD = min, IOL = 100 μA)
VOL
—0.2
V
Note:
1. The symbol VIN, in this case, represents the OVIN symbol referenced in Table 2 and Table 3.
Table 44. SPI AC Timing Specifications1
Characteristic
Symbol2
Min
Max
Unit
SPI outputs valid—master mode (internal clock) delay
tNIKHOV
1ns
SPI outputs hold—master mode (internal clock) delay
tNIKHOX
-0.2
ns
SPI outputs valid—slave mode (external clock) delay
tNEKHOV
8ns
SPI outputs hold—slave mode (external clock) delay
tNEKHOX
2ns
SPI inputs—master mode (internal clock input setup time
tNIIVKH
4ns
SPI inputs—master mode (internal clock input hold time
tNIIXKH
0ns
SPI inputs—slave mode (external clock) input setup time
tNEIVKH
4ns
SPI inputs—slave mode (external clock) input hold time
tNEIXKH
2ns
Notes:
1. Output specifications are measured from the 50 percent level of the rising edge of CLKIN to the 50 percent level of the signal.
Timings are measured at the pin.
2. The symbols for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for inputs
and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tNIKHOX symbolizes the internal timing
(NI) for the time SPICLK clock reference (K) goes to the high state (H) until outputs (O) are invalid (X).
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