參數(shù)資料
型號(hào)： MC74VHCT374AML2
廠商： ON SEMICONDUCTOR
元件分類： 總線收發(fā)器
英文描述： AHCT/VHCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝： EIAJ, SOIC-20
文件頁數(shù)： 4/10頁
文件大?。?/td> 140K
代理商： MC74VHCT374AML2
MC74VHCT374A
http://onsemi.com
3
DC ELECTRICAL CHARACTERISTICS
Unit
TA = – 40 to 85°C
TA = 25°C
VCC
V
Test Conditions
Parameter
Symbol
Unit
Max
Min
Max
Typ
Min
VCC
V
Test Conditions
Parameter
Symbol
ICCT
Quiescent Supply
Current
Per Input: VIN = 3.4V
Other Input: VCC or GND
5.5
1.35
1.50
mA
IOPD
Output Leakage
Current
VOUT = 5.5V
0
0.5
5.0
A
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
TA = 25°C
TA = – 40 to 85°C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Min
Max
Unit
fmax
Maximum Clock Frequency
(50% Duty Cycle)
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
90
85
140
130
80
95
MHz
tPLH,
tPHL
Maximum Propagation Delay,
CP to Q
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
4.1
5.6
9.4
10.4
1.0
1.0
10.5
11.5
ns
tPZL,
tPZH
Output Enable Time,
OE to Q
VCC = 5.0 ± 0.5V
CL = 15pF
RL = 1k
CL = 50pF
6.5
7.3
10.2
11.2
1.0
11.5
12.5
ns
tPLZ,
tPHZ
Output Disable Time
OE to Q
VCC = 5.0 ± 0.5V
CL = 50pF
RL = 1k
7.0
11.2
1.0
12.0
ns
tOSLH,
tOSHL
Output to Output Skew
VCC = 5.0 ± 0.5V
CL = 50pF
(Note 1.)
1.0
1.0
ns
Cin
Maximum Input Capacitance
4
10
10
pF
Cout
Maximum Three–State Output
Capacitance (Output in
High–Impedance State)
9
pF
Typical @ 25
°C, VCC = 5.0V
CPD
Power Dissipation Capacitance (Note 2.)
25
pF
1. Parameter guaranteed by design. tOSLH = |tPLHm – tPLHn|, tOSHL = |tPHLm – tPHLn|.
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC/8 (per flip–flop). CPD is used to determine the
no–load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V)
TA = 25°C
Symbol
Parameter
Typ
Max
Unit
VOLP
Quiet Output Maximum Dynamic VOL
1.2
1.6
V
VOLV
Quiet Output Minimum Dynamic VOL
–1.2
–1.6
V
VIHD
Minimum High Level Dynamic Input Voltage
2.0
V
VILD
Maximum Low Level Dynamic Input Voltage
0.8
V
TIMING REQUIREMENTS (Input tr = tf = 3.0ns)
TA = 25°C
TA = – 40
to 85
°C
Symbol
Parameter
Test Conditions
Typ
Limit
Unit
tw
Minimum Pulse Width, CP
VCC = 5.0 ± 0.5 V
6.5
8.5
ns
tsu
Minimum Setup Time, D to CP
VCC = 5.0 ± 0.5 V
2.5
ns
th
Minimum Hold Time, D to CP
VCC = 5.0 ± 0.5 V
2.5
ns
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