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參數(shù)資料
| 型號(hào)： | MC74VHCT02AMR2 |
| 廠(chǎng)商： | ON SEMICONDUCTOR |
| 元件分類(lèi)： | 門(mén)電路 |
| 英文描述： | AHCT/VHCT SERIES, QUAD 2-INPUT NOR GATE, PDSO14 |
| 封裝： | EIAJ, SOIC-14 |
| 文件頁(yè)數(shù)： | 4/8頁(yè) |
| 文件大小： | 156K |
| 代理商： | MC74VHCT02AMR2 |
http://onsemi.com
4
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
Symbol
Parameter
Test Conditions
TA = 25°C
TA ≤ 85°C
TA ≤ 125°C
Unit
Min
Typ
Max
Min
Max
Max
Max
tPLH,
tPHL
Maximum Propagation
Delay,
Input A or B to Y
VCC = 3.0 ± 0.3V CL = 15pF
CL = 50pF
5.6
8.1
7.9
11.4
9.5
13.0
12.5
17.5
ns
VCC = 5.0 ± 0.5V CL = 15pF
CL = 50pF
3.6
5.1
5.5
7.5
6.5
8.5
9.0
11.0
Cin
Maximum Input Capacitance
4
10
10
10
pF
CPD
Power Dissipation Capacitance (Note 1)
Typical @ 25°C, VCC = 5.0V
pF
20
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC/4 (per gate). CPD is used to determine the
noload dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V)
Symbol
Characteristic
TA = 25°C
Unit
Typ
Max
VOLP
Quiet Output Maximum Dynamic VOL
0.3
0.8
V
VOLV
Quiet Output Minimum Dynamic VOL
0.3
0.8
V
VIHD
Minimum High Level Dynamic Input Voltage
3.5
V
VILD
Maximum Low Level Dynamic Input Voltage
1.5
V
Figure 3. Switching Waveforms
3.0V
GND
1.5V
A or B
Y
tPHL
tPLH
*Includes all probe and jig capacitance
Figure 4. Test Circuit
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
VOH
VOL
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