參數(shù)資料
型號: MC74VHCT00AM
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Quad 2-Input NAND Gate
中文描述: AHCT/VHCT SERIES, QUAD 2-INPUT NAND GATE, PDSO14
封裝: EIAJ, SOIC-14
文件頁數(shù): 2/5頁
文件大?。?/td> 134K
代理商: MC74VHCT00AM
MC74VHCT00A
MOTOROLA
VHC Data – Advanced CMOS Logic
DL203 — Rev 1
2
may occur. Exposure to these conditions or conditions beyond those indicated may adversely
affect device reliability. Functional operation under absolute–maximum–rated conditions is not
implied.
Derating — SOIC Packages: – 7 mW/ C from 65 to 125 C
TSSOP Package: – 6.1 mW/ C from 65 to 125 C
– 0.5 to VCC + 0.5
IIK
Input Diode Current
– 20
mA
– 0.5 to + 7.0
V
DC Supply Current, VCC and GND Pins
±
50
mA
450
Tstg
Storage Temperature
– 65 to + 150
C
DC ELECTRICAL CHARACTERISTICS
0
VCC
5.5
V
Input Rise and Fall Time
VCC =5.0V
±
0.5V
0
20
ns/V
S
b l
P
T
C
di i
Symbol
VIH
V
TA = 25
°
C
Typ
TA = – 40 to 85
°
C
Min
U i
Parameter
Minimum High–Level
Test Conditions
μ
4.5 to
Min
2.0
Max
0.0
0.1
Max
Unit
V
2.0
2.0
Minimum High–Level
5.5
0.1
V
Vin = VIH or VIL
0 to 5.5
Maximum Input
Leakage Current
VOL
IOL = 50
μ
A
4.5
±
1.0
μ
A
0.1
V
IOL = 8mA
4.5
0.36
0.44
ICC
5.5
20.0
μ
A
mA
5.0
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND
(Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
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