參數(shù)資料
型號(hào): MC74VHC4066
廠商: ON SEMICONDUCTOR
英文描述: Quad Analog Switch/Multiplexer/Demultiplexer(四模擬開關(guān)/多路復(fù)用器/分配器)
中文描述: 四模擬開關(guān)/多路復(fù)用器/多路解復(fù)用器(四模擬開關(guān)/多路復(fù)用器/分配器)
文件頁(yè)數(shù): 2/12頁(yè)
文件大?。?/td> 141K
代理商: MC74VHC4066
http://onsemi.com
2
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — SOIC Package: – 7 mW/ C from 65 to 125 C
TSSOP Package: – 6.1 mW/ C from 65 to 125 C
V
Positive DC Supply Voltage (Referenced to GND)
V
Analog Input Voltage (Referenced to GND)
– 0.5 to + 14.0
– 0.5 to V
+ 0.5
mA
V
V
in
Digital Input Voltage (Referenced to GND)
V
I
DC Current Into or Out of Any Pin
P
D
Power Dissipation in Still Air,
– 0.5 to V
CC
+ 0.5
V
T
stg
Storage Temperature
±
25
SOIC Package
TSSOP Package
500
450
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
– 65 to + 150
C
260
C
*For voltage drops across the switch greater than 1.2 V (switch on), excessive V
CC
current may
be drawn; i.e., the current out of the switch may contain both V
CC
and switch input
components. The reliability of the device will be unaffected unless the Maximum Ratings are
exceeded.
Symbol
Parameter
Min
Max
Unit
CC
IS
in
IO
CC
CC
Input Rise and Fall Time, ON/OFF Control
Inputs (Figure 14)
V
CC
= 2.0 V
V
CC
= 3.0 V
V
CC
= 9.0 V
CC
0
0
0
0
1000
600
400
Guaranteed Limit
Symbol
ON/OFF Control Inputs
Parameter
ON/OFF Control Inputs
V
IO
= 0 V
Test Conditions
9.0
V
6.3
V
CC
25 C
– 55 to
2.1
3.15
6.3
125 C
6.3
μ
A
Maximum Quiescent Supply
Current (per Package)
12.0
6.0
12.0
3.6
2
4
3.0
4.5
3.6
20
40
2.1
3.6
40
160
2.1
IL
on
2.0
3.0
4.5
9.0
1.35
0.5
0.9
1.35
2.7
1.35
I
Maximum Input Leakage
V
= V
or GND
12.0
±
0.1
±
1.0
±
1.0
μ
A
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND
(V
in
or V
out
)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
I/O pins must be connected to a
properly terminated line or bus.
V
CC
.
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