參數(shù)資料
型號(hào): MC74VHC1GT125DF2
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs
中文描述: AHC/VHC SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5
封裝: SC-70, SC-88A, SOT-353, 5 PIN
文件頁數(shù): 1/6頁
文件大?。?/td> 68K
代理商: MC74VHC1GT125DF2
Semiconductor Components Industries, LLC, 2004
September, 2004 Rev. 12
1
Publication Order Number:
MC74VHC1G125/D
MC74VHC1G125
Noninverting 3State Buffer
The MC74VHC1G125 is an advanced high speed CMOS
noninverting 3state buffer fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining CMOS low power
dissipation.
The internal circuit is composed of three stages, including a buffered
3state output which provides high noise immunity and stable output.
The MC74VHC1G125 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHC1G125 to be used to interface 5.0 V circuits to
3.0 V circuits.
Features
These are PbFree Devices
High Speed: t
PD
= 3.5 ns (Typ) at V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 1 A (Max) at T
A
= 25
°
C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 58; Equivalent
Gates = 15
Figure 1. Pinout
(Top View)
V
CC
OE
IN A
OUT Y
GND
IN A
OUT Y
EN
OE
Figure 2. Logic Symbol
1
2
3
4
5
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
FUNCTION TABLE
L
H
X
A Input
Y Output
L
H
Z
OE Input
L
L
H
MARKING
DIAGRAMS
Pin 1
d = Date Code
W0
d
SC88A/SOT353/SC70
DF SUFFIX
CASE 419A
TSOP5/SOT23/SC59
DT SUFFIX
CASE 483
Pin 1
d = Date Code
W0
d
PIN ASSIGNMENT
1
2
3
GND
OE
IN A
4
5
V
CC
OUT Y
http://onsemi.com
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PDF描述
MC74VHC1GT125DT1 Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs
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