參數(shù)資料
型號(hào): MC74VHC08M
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Quad 2-Input AND Gate
中文描述: AHC/VHC SERIES, QUAD 2-INPUT AND GATE, PDSO14
封裝: EIAJ, SO-14
文件頁(yè)數(shù): 3/5頁(yè)
文件大?。?/td> 137K
代理商: MC74VHC08M
MC74VHC08
VHC Data – Advanced CMOS Logic
DL203 — Rev 1
3
MOTOROLA
di i
tPHL
Cin
0.5V
4.3
5.8
CL = 50pF
8.7
12.3
1.0
1.0
1.0
7.0
9.0
14.0
5.9
7.9
4
10
10
pF
CPD
Power Dissipation Capacitance (Note 1.)
1 )
Typical @ 25
°
C, VCC = 5.0 V
18
pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR
)
= CPD VCC fin + ICC/4 (per gate). CPD s used to determine the no–load
dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS
(Input tr = tf = 3.0 ns, CL = 50pF, VCC = 5.0 V)
Symbol
b l
Characteristic
i i
TA = 25
°
C
Typ
U i
Unit
Max
VOLP
VOLV
VIHD
VILD
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
Minimum High Level Dynamic Input Voltage
0.3
0.8
V
– 0.3
– 0.8
V
3.5
V
Maximum Low Level Dynamic Input Voltage
1.5
V
Figure 1. Switching Waveforms
Y
A or B
50% VCC
tPLH
tPHL
GND
VCC
50%
CL*
*Includes all probe and jig capacitance
Figure 2. Test Circuit
TEST
POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 3. Input Equivalent Circuit
INPUT
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